LY62L10248GL Просмотр технического описания (PDF) - Lyontek Inc.
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LY62L10248GL Datasheet PDF : 13 Pages
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®
Rev. 0.6
LY62L10248
1024K X 8 BIT LOW POWER CMOS SRAM
DATA RETENTION CHARACTERISTICS
PARAMETER SYMBOL
TEST CONDITION
MIN.
VCC for Data Retention VDR CE# ≧ VCC - 0.2V or CE2≦0.2V
1.2
LL
-
LLE
-
Data Retention Current
VCC = 1.2V
LLI
-
IDR
CE# ≧VCC-0.2V or CE2≦0.2V
other pins at 0.2V or VCC-0.2V
SL
SLE
SLI
25℃
40℃
-
-
SL/SLE -
SLI
-
Chip Disable to Data
Retention Time
tCDR
See Data Retention
Waveforms (below)
0
Recovery Time
tR
tRC*
tRC* = Read Cycle Time
DATA RETENTION WAVEFORM
Low Vcc Data Retention Waveform (1) (CE# controlled)
TYP.
-
2
2
2
1
1
1
1
-
-
MAX.
3.6
25
30
40
3
3
15
20
-
-
UNIT
V
µA
µA
µA
µA
µA
µA
µA
ns
ns
Vcc
CE#
Vcc(min.)
tCDR
VIH
VDR ≧ 1.2V
CE# ≧ Vcc-0.2V
Vcc(min.)
tR
VIH
Low Vcc Data Retention Waveform (2) (CE2 controlled)
Vcc
CE2
Vcc(min.)
tCDR
VIL
VDR ≧ 1.2V
CE2 ≦ 0.2V
Vcc(min.)
tR
VIL
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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