Z80181_ Просмотр технического описания (PDF) - Zilog

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Компоненты Описание

производитель

Z80181_

Family MPU

Zilog 

Z8018x Family

MPU User Manual

308

Memory and I/O Wait state insertion 29

Memory management unit (MMU) 13

Memory to ASCI 109

Memory to memory 105

MMU Register description 60

Mode

HALT 31

IOSTOP 35

SLEEP 33

SYSTEM STOP 35

Modem control signals 138

N

NMI

and DMA operation timing diagram 115

Use 74

Non-maskable interrupt 72

O

On-chip clock generator

Circuit board design rules170

External clock interface 169

Operating frequencies 168

Operation modes

Control register 84

CPU timing 18

IOC 16

M1 Enable 15

M1 temporary enable 16

P

Pin description

A0 through CTS1 7

BUSREQ through RFSH 9

D0 through INT2 8

RTS0 through TEND1 10

TEST through XTAL 10

Pin package

64-pin DIP 3

68-pin PLCC 4

80-pin QFP 5

Programmable reload timer (PRT) 14

Programming

Level-sense 109

PRT

Block diagram 157

Bus release mode timing diagram 167

Interrupt request generation 164

Timer control register 161

R

Refresh 87

Control register 88

Register

ASCI Control A0 125

ASCI Control A1 128

ASCI Control B 131

ASCI Status 0 120

ASCI Status 1 123

UM005001-ZMP0400

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