LC72133M, 72133V
5. Serial Data Input (IN1/IN2) tSU, tHD, tEL, tES, tEH ≥ 0.75 μs, tLC < 0.75 μs
➀ CL: Normal high
CE
tEL
tES
CL
tSU
tHD
DI
B0 B1 B2 B3 A0 A1 A2 A3 P0 P1 P2 P3
Internal data
➁ CL: Normal low
tEL
tES
CE
CL
tSU
tHD
DI
B0 B1 B2 B3 A0 A1 A2 A3 P0 P1 P2 P3
Internal data
tEH
R0 R1 R2 R3
tLC
A11922
tEH
R0 R1 R2 R3
tLC
A11923
6. Serial Data Output (OUT) tSU, tHD, tEL, tES, tEH ≥ 0.75 μs, tDC, tDH < 0.35 μs
➀ CL: Normal high
CE
tEL
tES
CL
tSU
tHD
DI
B0 B1 B2 B3 A0 A1 A2 A3
tDC
tDC
DO
I2 I1
UL
➁ CL: Normal low
CE
tEL
tES
CL
tSU
tHD
DI
B0 B1 B2 B3 A0 A1 A2 A3
tDC
tDC
DO
I2 I1
UL
tEH
tDH
C3 C2 C1 C0
A11924
tEH
tDH
C3 C2 C1 C0
A11925
Note: Since the DO pin is an n-channel open-drain circuit, the time for the data to change (tDC and tDH) will differ depending on the value of the pull-up
resistor and printed circuit, board capacitance.
No. 5427-13/23