CY37032VP100-143NTXI Просмотр технического описания (PDF) - Cypress Semiconductor
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CY37032VP100-143NTXI Datasheet PDF : 64 Pages
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Typical 5.0V Power Consumption (continued)
CY37064
90
80
70
60
50
40
30
20
10
0
0
20
40
60
Ultra37000 CPLD Family
Low Power
H igh S peed
80
100
120
140
160
180
Frequency (M Hz)
CY37128
160
140
120
100
80
60
40
20
0
0
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 5.0V, TA = Room Temperature
H igh S peed
Low Power
20
40
60
80
100
120
140
160
180
Frequency (M Hz)
The typical pattern is a 16-bit up counter, per logic block, with outputs disabled.
VCC = 5.0V, TA = Room Temperature
Document #: 38-03007 Rev. *D
Page 25 of 64
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