ADF4113BRU(Rev0) Просмотр технического описания (PDF) - Analog Devices

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производитель

ADF4113BRU
(Rev.:Rev0)

RF PLL Frequency Synthesizers

Analog Devices 

ADF4110/ADF4111/ADF4112/ADF4113

APPLICATIONS SECTION

Local Oscillator for GSM Base Station Transmitter

The following diagram shows the ADF4111/ADF4112/ADF4113

being used with a VCO to produce the LO for a GSM base station

transmitter.

The reference input signal is applied to the circuit at FREFIN

and, in this case, is terminated in 50 Ω. Typical GSM system

would have a 13 MHz TCXO driving the Reference Input

without any 50 Ω termination. In order to have a channel

spacing of 200 kHz (the GSM standard), the reference input

must be divided by 65, using the on-chip reference divider of

the ADF4111/ADF4112/ADF4113.

The charge pump output of the ADF4111/ADF4112/ADF4113

(Pin 2) drives the loop filter. In calculating the loop filter com-

ponent values, a number of items need to be considered. In this

example, the loop filter was designed so that the overall phase

margin for the system would be 45 degrees. Other PLL system

specifications are:

KD = 5 mA

KV = 12 MHz/V

Loop Bandwidth = 20 kHz

FREF = 200 kHz

N = 4500

Extra Reference Spur Attenuation = 10 dB

All of these specifications are needed and used to come up with

the loop filter components values shown in Figure 29.

The loop filter output drives the VCO, which, in turn, is fed

back to the RF input of the PLL synthesizer and also drives

the RF Output terminal. A T-circuit configuration provides

50 Ω matching between the VCO output, the RF output and

the RFIN terminal of the synthesizer.

In a PLL system, it is important to know when the system is in

lock. In Figure 29, this is accomplished by using the MUXOUT

signal from the synthesizer. The MUXOUT pin can be pro-

grammed to monitor various internal signals in the synthesizer.

One of these is the LD or lock-detect signal.

VDD

VP

FREFIN

7 15 16

AVDD DVDD VP

1000pF 1000pF

2

8 REFIN

CP

51⍀

1nF

ADF4111

ADF4112

ADF4113

3.3k⍀

5.6k⍀

8.2nF

4.7k⍀

CE

CLK

DATA

14

MUXOUT

LOCK

DETECT

LE

1

RSET

RFINA 6

RFINB 5

100pF

51⍀

349

100pF

RFOUT

100pF

C

620pF

B

VCC

VCO190-902T

100pF 18⍀

P

18⍀

18⍀

DECOUPLING CAPACITORS ON AVDD, DVDD, VP OF THE ADF411X

AND ON THE POSITIVE SUPPLY OF THE VCO190-902T HAVE

BEEN OMITTED FROM THE DIAGRAM TO AID CLARITY.

Figure 29. Local Oscillator for GSM Base Station

REV. 0

–19–

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