HD6433024F Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics
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Компоненты Описание
производитель
HD6433024F Datasheet PDF : 824 Pages
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18.3.3 Erase Block Register (EBR).................................................................................. 521
18.3.4 RAM Control Register (RAMCR) ........................................................................ 522
18.4 Overview of Operation ....................................................................................................... 524
18.4.1 Mode Transitions .................................................................................................. 524
18.4.2 On-Board Programming Modes............................................................................ 526
18.4.3 Flash Memory Emulation in RAM........................................................................ 528
18.4.4 Block Configuration.............................................................................................. 529
18.5 On-Board Programming Mode........................................................................................... 530
18.5.1 Boot Mode............................................................................................................. 531
18.5.2 User Program Mode .............................................................................................. 536
18.6 Flash Memory Programming/Erasing ................................................................................ 538
18.6.1 Program Mode....................................................................................................... 540
18.6.2 Program-Verify Mode ........................................................................................... 541
18.6.3 Erase Mode............................................................................................................ 545
18.6.4 Erase-Verify Mode................................................................................................ 545
18.7 Flash Memory Protection ................................................................................................... 547
18.7.1 Hardware Protection.............................................................................................. 547
18.7.2 Software Protection ............................................................................................... 548
18.7.3 Error Protection ..................................................................................................... 548
18.8 Flash Memory Emulation in RAM..................................................................................... 551
18.9 NMI Input Disabling Conditions........................................................................................ 552
18.10 Flash Memory PROM Mode.............................................................................................. 553
18.10.1 Socket Adapters and Memory Map ...................................................................... 553
18.10.2 Notes on Use of PROM Mode .............................................................................. 554
18.11 Flash Memory Programming and Erasing Precautions...................................................... 555
18.12 Notes when Converting the F-ZTAT Application Software to the Mask ROM Versions. 561
Section 19 Clock Pulse Generator ................................................................................... 563
19.1 Overview ............................................................................................................................ 563
19.1.1 Block Diagram ...................................................................................................... 563
19.2 Oscillator Circuit ................................................................................................................ 564
19.2.1 Connecting a Crystal Resonator............................................................................ 564
19.2.2 External Clock Input ............................................................................................. 566
19.3 Duty Adjustment Circuit .................................................................................................... 568
19.4 Prescalers............................................................................................................................ 568
19.5 Frequency Divider.............................................................................................................. 568
19.5.1 Register Configuration.......................................................................................... 569
19.5.2 Division Control Register (DIVCR) ..................................................................... 569
19.5.3 Usage Notes .......................................................................................................... 570
Section 20 Power-Down State .......................................................................................... 571
20.1 Overview ............................................................................................................................ 571
20.2 Register Configuration ....................................................................................................... 573
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