PCA9511ADR2G Просмотр технического описания (PDF) - ON Semiconductor

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производитель

PCA9511ADR2G

Hot Swappable I2C-Bus and SMBus Bus Buffer

ON Semiconductor 

PCA9511A

PIN ASSIGNMENT

PCA9511A

Figure 2. SOIC8 / Micro−8

PIN DESCRIPTIONS

Symbol

Pin

ENABLE

1

SCLOUT

2

SCLIN

3

GND

4

READY

5

SDAIN

6

SDAOUT

7

VCC

8

Description

Chip enable. Grounding this input puts the part in a low current (< 1 mA) mode. It also disables the

rise time accelerators, isolates SDAIN from SDAOUT and isolates SCLIN from SCLOUT.

Serial Clock Output to and from the SCL bus on the card

Serial Clock Input to and from the SCL bus on the backplane

Ground. Connect this pin to a ground plane for best results.

Open−drain output which pulls LOW when SDAIN and SCLIN are disconnected from SDAOUT

and SCLOUT, and goes HIGH when the two sides are connected Port.

Serial Data Input to and from the SDA bus on the backplane

Serial Data Output to and from the SDA bus on the card

Supply Voltage

FUNCTIONAL DESCRIPTION

Please refer to Figure 1 “Block Diagram of PCA9511A”.

Start−up

An undervoltage / initialization circuit holds the parts in

a disconnected state which presents high−impedance to all

SDA and SCL pins during power−up. A LOW on the

ENABLE pin also forces the parts into the low current

disconnected state when the ICC is essentially zero. As the

power supply is brought up and the ENABLE is HIGH or the

part is powered and the ENABLE is taken from LOW to

HIGH, it enters an initialization state where the internal

references are stabilized and the precharge circuit is enabled.

At the end of the initialization state, the ‘Stop Bit And Bus

Idle’ detect circuit is enabled. With the ENABLE pin HIGH

long enough to complete the initialization state (ten) and

remaining HIGH when all the SDA and SCL pins have been

HIGH for the bus idle time or when all pins are HIGH and

a STOP condition is seen on the SDAIN and SCLIN pins,

SDAIN is connected to SDAOUT and SCLIN is connected

to SCLOUT. The 1 V precharge circuitry is activated during

the initialization and is deactivated when the connection is

made. The precharge circuitry pulls up the SDA and SCL

pins to 1 V through individual 100 kW nominal resistors.

This precharges the pins to 1 V to minimize the worst case

disturbances that result from inserting a card into the

backplane where the backplane and the card are at opposite

logic levels.

Connect Circuitry

Once the connection circuitry is activated, the behavior of

SDAIN and SDAOUT, as well as SCLIN and SCLOUT,

become identical with each acting as a bidirectional buffer

that isolates the input capacitance from the output bus

capacitance while communicating the logic levels. A LOW

forced on either SDAIN or SDAOUT will cause the other

pin to be driven to a LOW by the part. The same is also true

for the SCL pins. Noise between 0.7VCC and VCC is

generally ignored because a falling edge is only recognized

when it falls below 0.7 VCC with a slew rate of at least

1.25 V/ms. When a falling edge is seen on one pin, the other

pin in the pair turns on a pull−down driver that is referenced

to a small voltage above the falling pin. The driver will pull

the pin down at a slew rate determined by the driver and the

load initially, because it does not start until the first falling

pin is below 0.7 VCC. The first falling pin may have a fast or

slow slew rate, if it is faster than the pull down slew rate, then

the initial pull−down rate will continue. If the first falling pin

has a slow slew rate, then the second pin will be pulled down

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