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23A1024

1Mbit SPI Serial SRAM with SDI and SQI Interface

Microchip Technology 

23A1024/23LC1024

3.0 PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

SOIC/PDIP/TSSOP

Symbol

1

CS

2

SO/SIO1

3

SIO2

4

VSS

5

SI/SIO0

6

SCK

7

HOLD/SIO3

8

VCC

Description

Chip Select Input

Serial Output (SPI)/Serial I/O 1 (SDI)/Serial I/O 1 (SQI)

Serial I/O 2 (SQI)

Ground

Serial Input (SPI)/Serial I/O 0 (SDI)/Serial I/O 0 (SQI)

Serial Clock Input

Hold/Serial I/O 3

Power Supply

FIGURE 3-1:

SPI, SDI and SQI Pin Configurations

SPI Mode:

CS 1

SO 2

NU 3

Vss 4

8 VCC

7 HOLD

6 SCK

5 SI

SDI Mode:

CS 1

SIO1 2

NU 3

Vss 4

8 VCC

7 HOLD

6 SCK

5 SIO0

SQI Mode:

CS 1

SIO1 2

SIO2 3

Vss 4

8 VCC

7 SIO3

6 SCK

5 SIO0

Note: Pin 3 is not used in SPI and SDI modes, and should not be left floating (see Section 3.3 “Serial I/O

(SIO2)”).

3.1 Chip Select (CS)

A low level on this pin selects the device. A high level

deselects the device and forces it into Standby mode.

When the device is deselected, SO goes to the

high-impedance state, allowing multiple parts to share

the same SPI bus. After power-up, a low level on CS is

required, prior to any sequence being initiated.

3.2 Serial Output, Serial I/O (SO/SIO1)

The SO/SIO1 pin is used to transfer data out of the

23A1024/23LC1024 when the SPI bus is being used.

When in SDI or SQI bus modes, the SO/SIO1 pin is a

bidirectional I/O pin. Data is shifted out on this pin after

the falling edge of the serial clock, and it is latched in

on the rising edge of the serial clock.

3.3 Serial I/O 2 (SIO2)

The SIO2 pin is a bidirectional I/O pin used only in SQI

mode. If not using SQI bus mode, this pin should not be

left floating. Deciding to pull the SIO2 pin high would

allow successful recovery of the bus from SQI bus

mode in case an accidental EQIO command has been

registered.

3.4 Serial Input, Serial I/O 0 (SI/SIO0)

The SI pin is used to transfer data into the device when

the SPI bus is being used. When in SDI or SQI bus

modes, the SI/SIO0 pin is a bidirectional I/O pin.

3.5 Serial Clock (SCK)

The SCK is used to synchronize the communication

between a master and the 23A1024/23LC1024.

Instructions, addresses or data present on the SI pin

are latched on the rising edge of the clock input, while

data on the SO pin is updated after the falling edge of

the clock input.

3.6 Hold, Serial I/O 3 (HOLD/SIO3)

When the device is in SQI bus mode, pin HOLD/SIO3

is a bidirectional I/O pin. When in SPI or SDI bus

modes, the pin has the HOLD function.

The HOLD pin is used to suspend transmission to the

23A1024/23LC1024 while in the middle of a serial

sequence without having to avoid retransmitting the

entire sequence over again. It must be held high any

time this function is not being used. Once the device is

DS20005142C-page 12

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