EN5339QI Просмотр технического описания (PDF) - Altera Corporation
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EN5339QI
Altera Corporation
EN5339QI Datasheet PDF : 20 Pages
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EN5339QI
Excess bulk capacitance on the output of the
device can cause an over-current condition at
startup. Maximum allowable output capacitance
depends on the device’s minimum current limit as
indicated in the Electrical Characteristics Table, the
output current at startup, the minimum soft-start
time also in the Electrical Characteristics Table and
the output voltage. The total maximum capacitance
on the output rail is estimated by the equation
below:
be properly powered if ENABLE is tied directly to
AVIN during startup. It is recommended to use an
external RC circuit to delay the ENABLE voltage
rise so that the internal controller has time to
startup into regulation (see circuit below). The RC
circuit may be adjusted so that AVIN and PVIN are
above UVLO before ENABLE is high. The startup
time will be delayed by the extra time it takes for
the capacitor voltage to reach the ENABLE
threshold.
COUT_MAX = 0.7 * (ILIMIT - IOUT) * tSS / VOUT
AVIN
COUT_MAX = maximum allowable output capacitance
ILIMIT = minimum current limit = 3.2A
IOUT = output current at startup
tSS = minimum soft-start time = 0.91ms
VOUT = output voltage
NOTE: Device stability still needs to be verified in
the application if extra bulk capacitors are added to
the output rail.
Over Current/Short Circuit Protection
When an over current condition occurs, VOUT is
pulled low and the device disables switching
internally. This condition is maintained for a period
of 1.2 ms and then a normal soft-start cycle is
initiated. If the over current condition still persists,
this cycle will repeat.
Under Voltage Lockout
An under voltage lockout circuit will hold off
switching during initial power up until the input
voltage reaches sufficient level to ensure proper
operation. If the voltage drops below the UVLO
threshold the lockout circuitry will again disable
switching. Hysteresis is included to prevent
chattering between UVLO high and low states.
Enable
The ENABLE pin provides means to shut down the
converter or initiate normal operation. A logic high
on the ENABLE pin will initiate the converter to start
the soft-start cycle and regulate the output voltage
to the desired value. A logic low will allow the
device to discharge the output and go into
shutdown mode for minimal power consumption.
When the output is discharged, an auxiliary NFET
turns on and limits the discharge current to 300 mA
or below. The ENABLE pin should not be left
floating as it could be in an unknown and random
state. It is recommended to enable the device after
both PVIN and AVIN is in regulation. At extremely
cold conditions below -30°C, the controller may not
1k
ENABLE
1µF
Figure 5: ENABLE Delay Circuit
Thermal Shutdown
When excessive power is dissipated in the device,
its junction temperature rises. Once the junction
temperature exceeds the thermal shutdown
temperature of 150°C, the thermal shutdown circuit
turns off the converter, allowing the device to cool.
When the junction temperature drops 15°C, the
device will be re-enabled and go through a normal
startup process.
Power OK
The Power OK (POK) feature is an open drain
output signal used to indicate if the output voltage
is within 92% of the set value. Within this range, the
POK output is allowed to be pulled high. Outside
this range, the POK output is maintained low.
During transitions such as power up and power
down, the POK output will not change state until the
transition is complete for enhanced noise immunity.
The POK has 1mA sink capability. When POK is
pulled high, the worst case pin leakage current is
as low as 500nA over temperature. This allows a
large pull up resistor such as 100kΩ to be used for
minimal current consumption in shutdown mode.
06903
June 26, 2015
www.altera.com/enpirion, Page 12
Rev E
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