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AS5SS256K36 Просмотр технического описания (PDF) - Micross Components

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AS5SS256K36 Datasheet PDF : 17 Pages
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SSRAM
AS5SS256K36
ABSOLUTE MAXIMUM RATINGS*
*Stresses greater than those listed under “Absolute
Storage Temperature (Plastics) ...........................-55C to +150C Maximum Ratings” may cause permanent damage to
Storage Temperature (Ceramics) .........................-55C to +125C the device. This is a stress rating only and functional
Short Circuit Output Current (per I/O)…............................100mA operation of the device at these or any other condi-
Voltage on any Pin Relative to Vss........................-0.5V to +4.6 V tions above those indicated in the operation section of
Max Junction Temperature**..............................................+150C this specication is not implied. Exposure to absolute
VIN (DQx) .........................................................-0.5V to VDDQ +0.5V
VIN
(inputs)
...................................................
....-0.5V
to
V
DD
+0.5V
maximum rating conditions for extended periods may
affect reliability.
** Junction temperature depends upon package type,
cycle time, loading, ambient temperature and airow,
and humidity.
3.3V I/O DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS
(-55oC to +125oC, -40oC to +105oC or -40oC to +85oC; VDD, VDDQ = +3.3V +0.3V/-0.165V un-
less otherwise noted)
PARAMETER
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Supply Voltage
Isolated Output Buffer Supply
CONDITION
OV < VIN < Vcc
Output(s) disabled, OV < VOUT < Vcc
IOH = -4.0 mA
IOL = 8.0 mA
SYMBOL
VIH
VIL
ILI
ILO
VOH
VOL
VDD
VDDQ
MIN
2.2
-0.3
-5
-5
2.4
---
3.135
3.135
MAX
VCC +0.3
0.8
5
5
--
0.4
3.6
3.6
UNITS
V
V
P$
P$
V
V
V
V
NOTES
1, 2
1, 2
3
1, 4
1, 4
1
1, 5
THERMAL RESISTANCE
Parameter
Ĭ JA
Ĭ JC
Description
TestConditions
Thermal Resistance (Junction to
Ambient)
Test conditions follow standard test methods
and procedures for measuring thermal
Thermal Resistance (Junction to Case) impedance, per EIA/JESD51
DQ
Package
29.41
6.31
DQC
Package
30.2
6.5
Unit
oC/W
oC/W
NOTES:
1. All voltages referenced to Vss (GND).
2. Overshoot: VIH < +4.6V for t<tKC/2 for I < 20mA
Undershoot: VIL > -0.7V for t<tKC/2 for I < 20mA
Power-up: VIH < +3.6V and VDD < 3.135V for t < 200ms
3. MODE and ZZ pins have internal pull-up resistors, and input leakage = +10A
4. The load used for VOH, VOL testing is shown in Figure 2 for 3.3V I/O. AC load current is higher than the stated DC values.
AC I/O curves are available upon request.
5. VDDQ should never exceed VDD. VDD and VDDQ can be connected together.
6. This parameter is sampled.
AS5SS256K36
Rev. 4.4 10/13
Micross Components reserves the right to change products or specications without notice.
7

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