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PEB2047 Просмотр технического описания (PDF) - Siemens AG

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производитель
PEB2047
Siemens
Siemens AG Siemens
PEB2047 Datasheet PDF : 50 Pages
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PEB 2047
PEB 2047-16
Pin Definitions and Functions (cont’d)
Pin No. Symbol
26
AD0
27
AD1
29
AD2
30
AD3
31
AD4
32
AD5
33
AD6
34
AD7
38
OUT0
37
OUT1
43
OUT2
42
OUT3
36
OUT4
35
OUT5
41
OUT6
40
OUT7
44
CLK
2
ALE
6
INT
Input (I)
Output (O)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
I
I
(OD)
Function
Address Data Bus: If the multiplexed address/data µP-
interface bus mode is selected these pins transfer data
and addresses between the µP and the MTSL.
If a demultiplexed mode is used, these bits interface with
the system data bus.
PCM-Output Port: Serial data is sent by these lines at
standard CMOS- or TTL levels. These pins can be
tristated.
Clock: 4096-kHz, 8192-kHz or 16 384-kHz device clock.
Address Latch Enable: In the Intel type multiplexed µP-
interface mode a logical high on this line indicates an
address of an MTSL internal register on the external
address/data bus. In the Intel type demultiplexed µP-
interface mode this line is hardwired to VSS, in the
demultiplexed Motorola type µP-interface mode it should
be connected to VDD.
Interrupt Line: Active low open drain output.
Semiconductor Group
8

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