NDS351AN Просмотр технического описания (PDF) - Fairchild Semiconductor

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NDS351AN

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Fairchild Semiconductor 

Typical Electrical Characteristics (continued)

5

VDS = 5.0V

4

3

2

T J = -55°C

25°C

125°C

1

0

0

1

2

3

4

5

I , DRAIN CURRENT (A)

D

Figure 13. Transconductance Variation with

Drain Current and Temperature.

20

10

5

3

1

RDS(ON) LIMIT

1ms

10ms

100ms

0.3

0.1

VGS = 4.5V

SINGLE PULSE

0.03

RθJA =See Note1b

TA = 25°C

0.01

0.1 0.2

0.5 1

2

1s

10s

DC

5

10 20 30 50

V , DRAI N-SOURCE VOLTAGE (V)

DS

Figure 14. Maximum Safe Operating Area.

1

0.8

0.6 1a

1b

0.4

0.2

0

0

4.5"x5" FR-4 Board

TA = 25 oC

Still Air

0.1

0.2

0.3

0.4

2oz COPPER MOUNTING PAD AREA (in 2 )

1.6

1.4

1.2

1a

1b

1

0.8

0

4.5"x5" FR-4 Board

TA = 2 5 o C

Still Air

VG S = 4 . 5 V

0.1

0.2

0.3

0.4

2oz COPPER MOUNTING PAD AREA (in 2 )

Figue 15. SuperSOTTM _ 3 Maximum

Steady-State

Power Dissipation versus Copper Mounting Pad Area.

Figure 16. Maximum Steady-State Drain

Current versus Copper Mounting Pad Area.

1

0.5

D = 0.5

0.2

0.1

0.05

0.02

0.01

0.005

0.2

0.1

0.05

0.02

0.01

Single Pulse

0.002

0.001

0.0001

0.001

0.01

0.1

1

t1, TIME (sec)

R θJA (t) = r(t) * RθJA

R θJA = See Note 1b

P(pk)

t1

t2

TJ - TA = P * RθJA (t)

Duty Cycle, D = t1 /t2

10

100

300

Figure 17. Transient Thermal Response Curve.

Note : Characterization performed using the conditions described in note 1b. Transient thermal response will

change depending on the circuit board design.

NDS351AN Rev. C

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