AT91SAM Просмотр технического описания (PDF) - Atmel Corporation

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AT91SAM

AT91SAM ARM-based Embedded MPU

Atmel Corporation 

8.3 Peripheral Interrupts and Clock Control

8.3.1

System Interrupt

The System Interrupt in Source 1 is the wired-OR of the interrupt signals coming from:

• The DDR2/LPDDR Controller

• The Debug Unit

• The Periodic Interval Timer

• The Real-Time Timer

• The Real-Time Clock

• The Watchdog Timer

• The Reset Controller

• The Power Management Controller

The clock of these peripherals cannot be deactivated and Peripheral ID 1 can only be used within the Advanced

Interrupt Controller.

8.3.2

External Interrupts

All external interrupt signals, i.e., the Fast Interrupt signal FIQ or the Interrupt signal IRQ, use a dedicated Periph-

eral ID. However, there is no clock control associated with these peripheral IDs.

SAM9G45 [DATASHEET] 24

6438K–ATARM–12-Feb-13

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