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ATMEGA32 Просмотр технического описания (PDF) - Atmel Corporation

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ATMEGA32 Datasheet PDF : 347 Pages
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SRAM Data Memory
ATmega32(L)
Figure 9 shows how the ATmega32 SRAM Memory is organized.
The lower 2144 Data Memory locations address the Register File, the I/O Memory, and
the internal data SRAM. The first 96 locations address the Register File and I/O Mem-
ory, and the next 2048 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Dis-
placement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In
the Register File, registers R26 to R31 feature the indirect Addressing Pointer
Registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base
address given by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-
increment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, and the 2048 bytes of inter-
nal data SRAM in the ATmega32 are all accessible through all these addressing modes.
The Register File is described in “General Purpose Register File” on page 11.
Figure 9. Data Memory Map
Register File
R0
R1
R2
...
Data Address Space
$0000
$0001
$0002
...
R29
R30
R31
I/O Registers
$00
$01
$02
...
$001D
$001E
$001F
$0020
$0021
$0022
...
$3D
$005D
$3E
$005E
$3F
$005F
Internal SRAM
$0060
$0061
...
$085E
$085F
17
2503J–AVR–10/06

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