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MC-4516CA726 Просмотр технического описания (PDF) - NEC => Renesas Technology

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MC-4516CA726 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
MC-4516CA726
(2/2)
Byte No.
Function Described
Hex
32 Command and address signal input setup 20H
time
33 Command and address signal input
10H
hold time
34 Data signal input setup time
20H
35 Data signal input hold time
10H
36-61
00H
62 SPD revision
12H
63 Checksum for bytes 0 - 62
-A80 02H
-A10 68H
64-71 Manufacture’s JEDEC ID code
72 Manufacturing location
73-90 Manufacture’s P/N
91-92 Revision code
93-94 Manufacturing date
95-98 Assembly serial number
99-125 Mfg specific
126 Intel specification frequency
64H
127 Intel specification /CAS
-A80 A7H
latency support
-A10 A5H
Bit 7 Bit 6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
1
1
0
1
0
Bit 5 Bit 4
1
0
0
1
1
0
0
1
0
0
0
1
0
0
1
0
1
0
1
0
1
0
Bit 3 Bit 2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
1
Bit 1 Bit 0 Notes
0
0 2 ns
0
0 1 ns
0
0 2 ns
0
0 1 ns
0
0
1
0 1.2
1
0
0
0
0
0 100 MHz
1
1
0
1
Timing Chart
Refer to the SYNCHRONOUS DRAM MODULE TIMING CHART Information (M13348E).
Data Sheet M14333EJ2V0DS00
11

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