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UPSD3212A(2009) Просмотр технического описания (PDF) - STMicroelectronics

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UPSD3212A Datasheet PDF : 181 Pages
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Architecture overview
UPSD3212A, UPSD3212C, UPSD3212CV
Figure 13. State sequence in UPSD321xx devices
Osc.
(XTAL2)
S1 S2 S3 S4 S5 S6 S1 S2 S3 S4 S5 S6
p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2 p1 p2
Read opcode
Read next
opcode and
discard
Read next
opcode
S1 S2 S3 S4 S5 S6
a. 1-Byte, 1-Cycle Instruction, e.g. INC A
Read opcode
Read 2nd
Byte
Read next
opcode
S1 S2 S3 S4 S5 S6
b. 2-Byte, 1-Cycle Instruction, e.g. ADD A, adrs
Read opcode
Read next
opcode and
discard
S1 S2 S3 S4 S5 S6
c. 1-Byte, 2-Cycle Instruction, e.g. INC DPTR
Read opcode
(MOVX)
Read next
opcode and
discard
S1 S2 S3 S4
d. 1-Byte, 2-Cycle MOVX Instruction
S5 S6
Addr
Read next
opcode and
discard
S1 S2 S3
No Fetch
No ALE
S1 S2 S3
Data
Read next
opcode and
discard
S4 S5 S6
No Fetch
S4 S5 S6
Access External Memory
Read next
opcode
Read next
opcode
AI06822
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