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ADP3408ARU-2.5

GSM Power Management System

Analog Devices 

ADP3408

THEORY OF OPERATION

The ADP3408 is a power management chip optimized for use

with GSM baseband chipsets in handset applications. Figure 1

shows a block diagram of the ADP3408.

The ADP3408 contains several blocks:

• Six Low Dropout Regulators (SIM, Core, Analog, Crystal

Oscillator, Memory, Real-Time Clock)

• Reset Generator

• Buffered Precision Reference

• Lithium Ion Charge Controller and Processor Interface

• Power-On/-Off Logic

• Undervoltage Lockout

• Deep Discharge Lockout

These functions have traditionally been done either as a discrete

implementation or as a custom ASIC design. The ADP3408

combines the benefits of both worlds by providing an integrated

standard product in which every block is optimized to operate in

a GSM environment while maintaining a cost competitive solution.

Figure 3 shows the external circuitry associated with the ADP3408.

Only a minimal number of support components are required.

Input Voltage

The input voltage range of the ADP3408 is 3 V to 5.5 V and is

optimized for a single Li-ion cell or three NiMH cells. The type

of battery, the package type, and the Core LDO output voltage

all affect the amount of power that the ADP3408 needs to dissi-

pate. The thermal impedance of the TSSOP package is 68°C/W

for four-layer boards. The thermal impedance of the CSP pack-

age is 32°C/W for four-layer boards.

The end of charge voltage for high capacity NiMH cells can be

as high as 5.5 V. This results in a worst-case power dissipation

for the ADP3408-1.8 as high as 1.07 W for NiMH cells. The

power dissipation for the ADP3408-2.5 is just slightly lower at 1 W.

A fully charged Li-ion battery is 4.25 V, where the ADP3408-

2.5 can dissipate a maximum power of 0.56 W in either

package. However, the ADP3408-1.8 can have a maximum

dissipation of 0.64 W, so only the CSP package can handle the

power dissipation at 85°C.

However, high battery voltages normally occur only when the

battery is being charged and the handset is not in conversation

mode. In this mode, there is a relatively light load on the LDOs.

The worst-case power dissipation should be calculated based on

the actual load currents and voltages used.

Figure 4a shows the maximum power dissipation as a function

of the input voltage. Figure 4b shows the maximum allowable

power dissipation as a function of ambient temperature.

1.2

1.0

ADP3408-1.8

0.8

ADP3408-2.5

0.6

0.4

0.2

0

3.0

3.5

4.0

4.5

5.0

5.5

6.0

INPUT VOLTAGE – V

Figure 4a. Power Dissipation vs. Input Voltage

1.2

1.0

LFCSP

32؇C/W

0.8

TSSOP

68؇C/W

0.6

0.4

0.2

0

–20

0

20

40

60

80

AMBIENT TEMPERATURE – ؇C

Figure 4b. Allowable Package Power Dissipation vs.

Temperature

Low Dropout Regulators (LDOs)

The ADP3408 high performance LDOs are optimized for their

given functions by balancing quiescent current, dropout voltage,

regulation, ripple rejection, and output noise. 2.2 µF tantalum

or MLCC ceramic capacitors are recommended for use with the

core, memory, SIM, and analog LDOs. A 0.22 µF capacitor is

recommended for the TCXO LDO.

REV. A

–13–

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