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AN4506 Просмотр технического описания (PDF) - STMicroelectronics

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AN4506 Datasheet PDF : 47 Pages
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Digital filters
AN4506
3.6.3
Example of angular rate data
Table 7 provides a few basic examples of the data that is read in the data-registers when the
device is subject to a given angular rate. The values listed in the table are given under the
hypothesis of perfect device calibration (i.e. no offset, no gain error,....) and practically show
the effect of the BLE bit.
Table 7. Output data registers content vs. angular rate (FS = 245 dps)
BLE = 0
BLE = 1
Angular rate values
Register address
0 dps
100 dps
200 dps
-100 dps
-200 dps
28h
29h
28h
29h
00h
00h
00h
00h
A4h
2Ch
2Ch
A4h
49h
59h
59h
49h
5Ch
D3h
D3h
5Ch
B7h
A6h
A6h
B7h
4
Digital filters
The L3GD20H provides embedded low-pass as well as high-pass filtering capability to
easily delete the DC component of the measured angular rate. As shown in Figure 7,
through the HPen, IG_Sel and Out_Sel bits of the CTRL5 register, it is possible to
independently apply the filter on the output/FIFO data and/or on the interrupt data. This
means that it is possible to get filtered data while the interrupt generation works on unfiltered
data.
BOOT
Table 8. CTRL5 register
FIFO_EN StopOnFTH HPen IG_Sel1 IG_Sel0
Out_Sel1
Out_Sel0
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DocID026442 Rev 2

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