KSZ9031RNX(2012) Просмотр технического описания (PDF) - Micrel

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производитель

KSZ9031RNX
(Rev.:2012)

Gigabit Ethernet Transceiver with RGMII Support

Micrel 

Micrel, Inc.

KSZ9031RNX

• 32-bit expected CRCs are written to and stored in:

- MMD address 2h, registers 14h – 15h // For customized packets, type 0

- MMD address 2h, registers 16h – 17h // For customized packets, type 1

- MMD address 2h, registers 18h – 19h // For customized packets, type 2

- MMD address 2h, registers 1Ah – 1Bh // For customized packets, type 3

• Masks to indicate which of the first 64-bytes to use in the CRC calculation are set in:

- MMD address 2h, registers 1Ch – 1Fh // For customized packets, type 0

- MMD address 2h, registers 20h – 23h // For customized packets, type 1

- MMD address 2h, registers 24h – 27h // For customized packets, type 2

- MMD address 2h, registers 28h – 2Bh // For customized packets, type 3

• 32-bit calculated CRCs (of receive packet) are stored in:

- MMD address 2h, registers 30h – 31h // For customized packets, type 0

- MMD address 2h, registers 32h – 33h // For customized packets, type 1

- MMD address 2h, registers 34h – 35h // For customized packets, type 2

- MMD address 2h, registers 36h – 37h // For customized packets, type 3

Link Status Change Detection

If link status change detection is enabled, the KSZ9031RNX asserts its PME output pin low whenever there is a link status

change, using the following MMD address 2h register bits and their enabled (1) or disabled (0) settings:

• MMD address 2h, register 10h, bit [0] // For link-up detection

• MMD address 2h, register 10h, bit [1] // For link-down detection

The PME output signal is available on either LED1/PME_N1 (pin 17) or INT_N/PME_N2 (pin 38), and is selected and

enabled using MMD address 2h, register 2h, bits [8] and [10], respectively. Additionally, MMD address 2h, register 10h,

bits [15:14] defines the output functions for pins 17 and 38.

The PME output is active low and requires a 1kΩ pull-up to the VDDIO supply. When asserted, the PME output is cleared

by disabling the register bit that enabled the PME trigger source (magic packet, customized packet, link status change).

October 2012

37

M9999-103112-1.0

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