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RTL8111E-VL-CG Просмотр технического описания (PDF) - Realtek Semiconductor

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RTL8111E-VL-CG Datasheet PDF : 37 Pages
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RTL8111E
Datasheet
6.4. Next Page
If 1000Base-T mode is advertised, three additional Next Pages are automatically exchanged between the
two link partners. Users can set PHY Reg4.15 to 1 to manually exchange extra Next Pages via Reg7 and
Reg8 as defined in IEEE 802.3ab.
6.5. EEPROM Interface
The RTL8111E requires the attachment of an external EEPROM. The 93C46/93C56/93C66 is a
1K-bit/2K-bit/4K-bit EEPROM. The EEPROM interface permits the RTL8111E to read from, and write
data to, an external serial EEPROM device.
Values in the internal eFUSE memory or external EEPROM allow default fields in PCI configuration
space and I/O space to be overridden following a power-on or software EEPROM auto-load command.
The RTL8111E will auto-load values from the eFUSE or EEPROM. If the EEPROM is not present and
eFUSE auto-load is bypassed, the RTL8111E initialization uses default values for the appropriate
Configuration and Operational Registers. Software can read and write to the EEPROM using bit-bang
accesses via the 9346CR Register, or using PCI VPD (Vital Product Data). The EEPROM interface
consists of EESK, EECS, EEDO, and EEDI.
The correct EEPROM (i.e., 93C46/93C56/93C66) must be used in order to ensure proper LAN function.
EEPROM
EECS
EESK
EEDI
EEDO
Table 17. EEPROM Interface
Description
93C46/93C56/93C66 Chip Select.
EEPROM Serial Data Clock.
Output to Serial Data Input Pin of EEPROM.
Output Data Bus.
Integrated Gigabit Ethernet Controller for PCI Express
15
Track ID: JATR-2265-11 Rev. 1.1

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