M35080FP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC
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M35080FP Datasheet PDF : 27 Pages
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MITSUBISHI MICROCOMPUTERS
M35080FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DATA INPUT EXAMPLE
Data of Bit map RAM and display control registers can be set by
the 16-bit serial input function. Example of data setting is shown in
Figure 14.
Address/Data DAF DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0
Remarks
Address 000016 0 0 0 0
Data 000016 0 0 0 0
Data 000116 0 0 0 0
Address 000016 0 0 0 0
Data 000016 0 0 0 0
Data 000216 0 VSIZE1 VSIZE0 0
Data 000316 0 0 0 0
Data 000416 0 0 0 0
Data 000516 0 0 0 0
Data 000616 0 1 0 0
Data 000716 0 0 0 0
Address 100016 0 0 0 1
Data 100016
Data 100116
Data 3AFE16
Data 3AFF16
Address 000016 0 0 0 0
Data 000016 0 0 0 0
Data
000216 0 VSIZE1 VSIZE0 0
Data 000316 0 0 0 0
Address 100016 0 0 0 1
Data 100016
Data 100116
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
0
0
0
0
0
0
0
0
0
0
1
1
Page A and B writing setting
(Note 1)
0
0
0
0
0
0
0
0
0
0
0
0 Page A and B display OFF
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
0
0
0
0
0
0
0
0
0
0
0
1 Page A writing setting
0 0 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
0 0 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
Vertical display
location setting
Horizontal display
location setting
0
0
0
0
0
0
0 POLV POLH MODE2 MODE1 MODE0 Display form setting
000000000000
—
0
0
0
0
0
0
0
0
0
0
0
0 DAC setting
0
0
0
0 SBLANK 3 SBLANK 2 SBLANK 1 SBLANK 0 PTD3 Port output setting
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
Bit map setting
Bit map RAM (Page A)
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
0
0
0
0
0
0
0
0
0
0
1
0 Page B writing setting
0 0 VP9 VP8 VP7 VP6 VP5 VP4 VP3 VP2 VP1 VP0
0 0 HP9 HP8 HP7 HP6 HP5 HP4 HP3 HP2 HP1 HP0
Vertical display
location setting
Horizontal display
location setting
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
Bit map setting
Bit map RAM (PageB)
Data 3AFF16
(R0,R1,R2,G0,G1,G2,B0,B1,B2)
Data 3AFF16
Address 000016 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 Address setting
Data
000016 0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
Page A and B writing setting
Data 000116 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 Display ON
Notes 1. Registers PAGEONA and PAGEONB perform writing control of data.
2. Input the clock with which the cycle was fixed and continued from the TCK pin. Moreover, input horizontal synchronized signal into HOR pin,
and input vertical synchronized signal into VERT pin.
Fig. 14 Example of data setting
19
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