MC74LCX373 Просмотр технического описания (PDF) - ON Semiconductor
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MC74LCX373 Datasheet PDF : 9 Pages
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MC74LCX373
Low-Voltage CMOS
Octal Transparent Latch
With 5 V-Tolerant Inputs and Outputs
(3-State, Non-Inverting)
The MC74LCX373 is a high performance, non-inverting octal
transparent latch operating from a 2.3 to 3.6 V supply. High
impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A VI specification of 5.5 V allows
MC74LCX373 inputs to be safely driven from 5 V devices.
The MC74LCX373 contains 8 D-type latches with 3-state outputs.
When the Latch Enable (LE) input is HIGH, data on the Dn inputs
enters the latches. In this condition, the latches are transparent, i.e., a
latch output will change state each time its D input changes. When LE
is LOW, the latches store the information that was present on the D
inputs a setup time preceding the HIGH-to-LOW transition of LE.
The 3-state standard outputs are controlled by the Output Enable (OE)
input. When OE is LOW, the standard outputs are enabled. When OE
is HIGH, the standard outputs are in the high impedance state, but this
does not interfere with new data entering into the latches.
Features
•ăDesigned for 2.3 to 3.6 V VCC Operation
•ă5 V Tolerant - Interface Capability With 5 V TTL Logic
•ăSupports Live Insertion and Withdrawal
•ăIOFF Specification Guarantees High Impedance When VCC = 0 V
•ăLVTTL Compatible
•ăLVCMOS Compatible
•ă24 mA Balanced Output Sink and Source Capability
•ăNear Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
•ăLatchup Performance Exceeds 500 mA
•ăESD Performance: Human Body Model >2000 V
Machine Model >200 V
•ăPb-Free Packages are Available*
20
1
http://onsemi.com
MARKING
DIAGRAMS
20
SOIC-20
DW SUFFIX
CASE 751D
1
LCX373
AWLYYWWG
20
1
20
TSSOP-20
DT SUFFIX
CASE 948E
1
LCX
373
ALYWG
G
20
1
20
SOEIAJ-20
M SUFFIX
CASE 967
1
74LCX373
AWLYWWG
A
L, WL
Y, YY
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©Ă Semiconductor Components Industries, LLC, 2007
1
November, 2007 - Rev. 8
Publication Order Number:
MC74LCX373/D
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