ATF22LV10CZ_98 Просмотр технического описания (PDF) - Atmel Corporation

Номер в каталоге

Компоненты Описание

производитель

ATF22LV10CZ_98

High Performance E2 PLD

Atmel Corporation 

ATF22LV10CZ

Functional Logic Diagram Description

The Functional Logic Diagram describes the

ATF22LV10CZ architecture.

The ATF22LV10CZ has 12 inputs and 10 I/O macrocells.

Each macrocell can be configured into one of four output

configurations: active-high/low or registered/combinato-

rial. The universal architecture of the ATF22LV10CZ can

be programmed to emulate most 24-pin PAL devices.

Unused product terms are automatically disabled by the

compiler to decrease power consumption. A Security

Fuse, when programmed, protects the contents of the

ATF22LV10CZ. Eight bytes (64 fuses) of User Signature

are accessible to the user for purposes such as storing

project name, part number, revision or date. The User

Signature is accessible regardless of the state of the Se-

curity Fuse.

DC Characteristics

Symbol Parameter

IIL

Input or I/O Low

Leakage Current

IIH

Input or I/O High

Leakage Current

ICC

Clocked Power

Supply Current

Condition

0 ≤ VIN ≤ VIL(MAX)

VCC - 0.7V ≤ VIN ≤ VCC

VCC = MAX,

Outputs Open, f = 15 MHz

ISB

IOS (1)

VIL

VIH

VOL

VOH

Power Supply Current, VCC = MAX,

Standby

VIN = MAX, Outputs Open

Output Short Circuit

Current

VOUT = 0.5V

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage

VIN = VIH or VIL

VCC = MIN,

IOL = 8 mA

VIN = VIH or VIL,

VCC = MIN,

IOH = -4.0 mA

Com.

Ind.

Com.

Ind.

Com.

Ind.

Min Typ Max

-10

10

55

85

60

90

5

25

5

50

-130

-0.5

0.8

2.0

VCC + 0.75

0.5

2.4

Note: 1. Not more than one output at a time should be shorted. Duration of short circuit test should not exceed 30 sec.

Units

µA

µA

mA

mA

µA

µA

mA

V

V

V

V

3

Share Link: