A1469LK Просмотр технического описания (PDF) - Allegro MicroSystems

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A1469LK

Three-Wire True Zero-Speed Differential Peak-Detecting Sensor IC with Continuous Calibration

Allegro MicroSystems 

A1469

Three-Wire True Zero-Speed Differential Peak-Detecting

Sensor IC with Continuous Calibration

The A1469 incorporates an algorithm for adjusting the signal gain

during running mode. This algorithm is designed to optimize the

VPROC signal amplitude in instances where the magnetic signal

“seen” during the calibration period is not representative of the

amplitude of the magnetic signal for the installed device air gap

(see Figure 7). Note that in this mode, the gain can be reduced but

not increased, so this algorithm applies only to instances in which

the magnetic signal amplitude during running is higher than that

during calibration.

1

2

3

4

5

Internal Differential

Signal, VPROC

BOP

BRP

BOP

BRP

Device Electrical

Output, VOUT

Figure 7: Operation of Running Mode Gain Adjust

• Position1. The device is initially powered-on. Self-calibration occurs.

• Position 2. Small amplitude oscillation of the target sends an erroneously small differential signal to the device. The amplitude of VPROC is

greater than the switching hysteresis (BOP and BRP), and the device output switches.

• Position 3. The calibration period completes on the third rising output edge, and the device enters running mode.

• Position 4. True target rotation occurs and the correct magnetic signal is generated for the installation air gap. The established signal gain

is too large for the target rotational magnetic signal at the given air gap.

• Position 5. Running mode calibration corrects the signal gain to an optimal level for the installation air gap.

Allegro MicroSystems, LLC

12

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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