Clock Configuration Modes
3.2.1 PCI Host Mode
The frequencies listed in Table 15 are for the purpose of illustration only. Users must select a mode and
input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s
device.
Table 15. Clock Default Configurations in PCI Host Mode (MODCK_HI = 0000)
MODCK[1–3]1
Input Clock
Frequency
(Bus)
CPM
Multiplication
Factor
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency
PCI Division
Factor 2
PCI
Frequency2
000
66 MHz
2
133 MHz
2.5
166 MHz
2/4
66/33 MHz
001
66 MHz
2
133 MHz
3
200 MHz
2/4
66/33 MHz
010
66 MHz
2.5
166 MHz
3
200 MHz
3/6
55/28 MHz
011
66 MHz
2.5
166 MHz
3.5
233 MHz
3/6
55/28 MHz
100
66 MHz
2.5
166 MHz
4
266 MHz
3/6
55/28 MHz
101
66 MHz
3
200 MHz
3
200 MHz
3/6
66/33 MHz
110
66 MHz
3
200 MHz
3.5
233 MHz
3/6
66/33 MHz
111
66 MHz
3
200 MHz
4
266 MHz
3/6
66/33 MHz
1 Assumes MODCK_HI = 0000.
2 The frequency depends on the value of PCI_MODCK. If PCI_MODCK is high (logic ‘1’), the PCI frequency is
divided by 2 (33 instead of 66 MHz, etc.) Refer to Table 12.
Table 16 describes all possible clock configurations when using the MPC8250’s internal PCI bridge in host
mode.
Table 16. Clock Configuration Modes in PCI Host Mode
MODCK_H
–
MODCK[1–
3]
Input Clock
Frequency 1
(Bus)
CPM
Multiplication
Factor
CPM
Frequency
Core
Multiplication
Factor
Core
Frequency
PCI Division
Factor 2
PCI
Frequency2
0001_000
0001_001
0001_010
0001_011
33 MHz
33 MHz
33 MHz
33 MHz
3
100 MHz
5
166 MHz
3/6
33/16 MHz
3
100 MHz
6
200 MHz
3/6
33/16 MHz
3
100 MHz
7
233 MHz
3/6
33/16 MHz
3
100 MHz
8
266 MHz
3/6
33/16 MHz
0010_000
0010_001
0010_010
0010_011
33 MHz
33 MHz
33 MHz
33 MHz
0011_000 3
0011_0013
33 MHz
33 MHz
4
133 MHz
5
166 MHz
4/8
33/16 MHz
4
133 MHz
6
200 MHz
4/8
33/16 MHz
4
133 MHz
7
233 MHz
4/8
33/16 MHz
4
133 MHz
8
266 MHz
4/8
33/16 MHz
5
166 MHz
5
166 MHz
5
5
166 MHz
6
200 MHz
5
33 MHz
33 MHz
MPC8250 Hardware Specifications, Rev. 2
24
Freescale Semiconductor