SSM2211_02 Просмотр технического описания (PDF) - Analog Devices
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SSM2211_02 Datasheet PDF : 16 Pages
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SSM2211
Recall that V = P ¥ R , so for PO = 1 W and RL = 8 W,
V = 2.8 V rms, or 8 V p-p. If the available input signal is 1.4 V
rms or more, use the board as is, with RF = RI = 20 kW. If more
gain is needed, increase the value of RF to obtain the desired gain.
When you have determined the closed-loop gain required by
your source level, and can develop 1 W across the 8 W load re-
sistor with the normal input signal level, replace the resistor
with your speaker. Your speaker may be connected across the
VO1 and VO2 posts for bridged mode operation only after the
8 W load resistor is removed. For no phase inversion, VO2
should be connected to the (+) terminal of the speaker.
VO2
CH A
5
2.5V
SSM2211 COMMON
MODE
GND
8⍀
1W
PROBES
8
CH B CH B DISPLAY
VO1
INV. ON A+B
OSCILLOSCOPE
Figure 11. Using an Oscilloscope to Display the Bridged
Output Voltage
To use the SSM2211 in a single ended output configuration,
replace J1 and J2 jumpers with electrolytic capacitors of a suit-
able value, with the NEGATIVE terminals to the output termi-
nals VO1 and VO2. The single ended loads may then be returned
to ground. Note that the maximum output power is reduced to
250 mW, one quarter of the rated maximum, due to the maxi-
mum swing in the non-bridged mode being one-half, and power
being proportional to the square of the voltage. For frequency
response down 3 dB at 100 Hz, a 200 mF capacitor is required
with 8 W speakers.
The SSM2211 evaluation board also comes with a SHUT-
DOWN switch which allows the user to switch between ON
(normal operation) and the power conserving shutdown mode.
Printed Circuit Board Layout Consideration—SOIC
All surface mount packages rely on the traces of the PC board
to conduct heat away from the package.
In standard packages, the dominant component of the heat re-
sistance path is the plastic between the die attach pad and the
individual leads. In typical thermally enhanced packages, one or
more of the leads are fused to the die attach pad, significantly
decreasing this component. To make the improvement mean-
ingful, however, a significant copper area on the PCB must be
attached to these fused pins.
The patented Thermal Coastline lead frame design used in the
SSM2211 (Figure 12) uniformly minimizes the value of the
dominant portion of the thermal resistance. It ensures that heat
is conducted away by all pins of the package. This yields a very
low, 98∞C/W, thermal resistance for an SO-8 package, without
any special board layer requirements, relying on the normal
traces connected to the leads. The thermal resistance can be de-
creased by approximately an additional 10% by attaching a few
square cm of copper area to the ground pins. It is recommended
that the solder mask and/or silk screen on the PCB traces adja-
cent to the SSM2211 pins be deleted, thus reducing further the
junction to ambient thermal resistance of the package.
COPPER
LEAD-FRAME
1
8
2
7
COPPER PADDLE
3
6
4
5
Figure 12. Thermal Coastline
Printed Circuit Board Layout Consideration—LFCSP
The LFCSP is a plastic encapsulated package with a copper
leadframe substrate. This is a leadless package with solder lands
on the bottom surface of the package instead of conventional
formed perimeter leads. A key feature that allows the user to
reach the quoted JA performance is the exposed die attach
paddle (DAP) on the bottom surface of the package. When
soldered to the PCB, the DAP can provide efficient conduction
of heat from the die to the PCB. For the user to achieve optimum
package performance, consideration should be given to the PCB
pad design for both the solder lands and the DAP. For further
information the user is directed to the Amkor Technology docu-
ment: “Application Notes for Surface Mount Assembly of
Amkor’s MicroLeadFrame (MLF) Packages.” This can be
downloaded from the Amkor Technology website,
www.amkor.com, as a product application note.
–14–
REV. B
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