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SA25F005LEM8 Просмотр технического описания (PDF) - Saifun Semiconductors

Номер в каталоге
Компоненты Описание
производитель
SA25F005LEM8
Saifun
Saifun Semiconductors Saifun
SA25F005LEM8 Datasheet PDF : 37 Pages
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Software Protection (SP)/
Deep Powerdown (DP)
The DP instruction is included in the device
in order to be compatible with other SPI
Flash devices, and is identical to the SP
instruction.
The SA25F005's low standby current of
1 µA is the same in both DP and Standby
modes. It is recommended that the
standard Standby mode be used for the
lowest power current draw, as well as an
extra SP mechanism while the device is
not in active use. This is due to the fact
that while in this mode, the device ignores
all Write, Program and Erase instructions.
The SP instruction is entered by driving
CSb low, followed by the instruction code
on the SI pin. CSb must be driven low for
the entire duration of the sequence. The
instruction sequence is shown in Figure 24.
SA25F005 Advanced Information
SAIFUN
30
CSb must be driven high after the eighth
bit of the instruction code has been latched
in; otherwise, the SP instruction is not
executed. As soon as CSb is driven high, it
requires a delay of tDP before SP mode is
entered.
Once the device has entered SP mode, all
instructions are ignored except the Release
from Software Protect and Read Electronic
Signature (RES) instructions, which
release the device from this mode. RES
instructions also enable the Electronic
Signature to be read on the SO pin.
SP mode automatically stops at
powerdown, and the device always powers
up in the Standby mode. Any SP
instruction executed while an Erase,
Program or WRSR cycle is in progress is
rejected without having any effect on the
cycle in progress.
CS
SCK
SI
tDP
01234567
Instruction
Standby Mode
Software Protect Mode
Figure 24. Software Protection Instruction Sequence

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