THC63LVD103 Просмотр технического описания (PDF) - THine Electronics, Inc.
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THC63LVD103 Datasheet PDF : 12 Pages
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THC63LVD103 _Rev2.2
THC63LVD103
135MHz 30Bits COLOR LVDS Transmitter
General Description
The THC63LVD103 transmitter is designed to support
pixel data transmission between Host and Flat Panel
Display from NTSC up to SXGA+ resolutions.
The THC63LVD103 converts 35bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for ris-
ing edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 135MHz, 30bits of
RGB data and 5bits of timing and control data
(HSYNC, VSYNC, DE, CNTL1, CNTL2) are transmit-
ted at an effective rate of 945Mbps per LVDS channel.
Features
• Wide dot clock range: 8-135MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+
• PLL requires no external components
• Supports spread spectrum clock generator
• On chip jitter filtering
• Clock edge selectable
• Supports reduced swing LVDS for low EMI
• Power down mode
• Low power single 3.3V CMOS design
• 64pin TQFP
• Backward compatible with
THC63LVDM63R(18bits) / M83R(24bits)
Block Diagram
CMOS/TTL INPUT
7
TA0-6
7
TB0-6
7
TC0-6
7
TD0-6
TE0-6 7
CLK IN
PLL
(8 to135MHz)
RS
R/F
/PDWN
LVDS OUTPUT
TA +/-
TB +/-
TC +/-
TD +/-
TE +/-
TCLK +/-
(8 to 135MHz)
Copyright 2001-2006 THine Electronics, Inc. All rights reserved.
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THine Electronics, Inc.
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