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TS68C429A

CMOS ARINC 429 Multichannel Receiver/Transmitter (MRT)

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TS68C429A

• Register Control Register

This read/write register controls the function of the related receiver channel:

The lowest value will give the highest priority. If two channels have the same priority, one of them will

never be able to send its interrupt vector to the microprocessor. Each channel must have a unique chan-

nel priority order.

Figure 8-4.

USD access

LDS access

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Not used

Wrong parity

Not used

Parity control

Channel priority order

Label control matrix write enable

Label control

Test mode

Channel enable

Table 8-1.

Bit

Bit 15

Bit 14

Bit 13

Bit 12

Bit 11

Bit 10

Bit 9

Bit 8

Register Control Register Description

Function

Comments

Channel enable

0: channel is out of service

1: channel is in service

Test mode

0: external ARINC lines as input (normal operation)

1: third transmitter lines as input (test mode)

Label control

0: no control, all the labels are accepted

1: automatic check of the label according to the label control matrix

LCMWE label control matrix 0: receiving mode (write to the matrix are disabled)

write enable

1: programmation mode for labels control matrix

Parity control

0: even parity check

1: odd parity check

Parity control

0: parity check is disable

1: parity check is enable

Not used

Not used

18

0848E–HIREL–02/08

e2v semiconductors SAS 2008

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