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ST72C314N4 Просмотр технического описания (PDF) - STMicroelectronics

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ST72C314N4 Datasheet PDF : 150 Pages
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DATA EEPROM (Cont’d)
6.4 POWER SAVING MODES
Wait mode
The Data EEPROM can enter Wait mode on exe-
cution of the WFI instruction of the microcontroller.
The Data EEPROM will immediately enter this
mode if there is no programming in progress, oth-
erwise the Data EEPROM will finish the cycle and
then enter Wait mode.
Halt mode
The Data EEPROM immediately enters Halt mode
if the microcontroller executes the HALT instruc-
tion. Therefore the EEPROM will stop the function
in progress, and data may be corrupted.
6.5 ACCESS ERROR HANDLING
If a read access occurs while LAT=1, then the data
bus will not be driven.
If a write access occurs while LAT=0, then the
data on the bus will not be latched.
If a programming cycle is interrupted (by software/
RESET action), the memory data will not be guar-
anteed.
Figure 8. Data EEPROM Programming Cycle
INTERNAL
PROGRAMMING
VOLTAGE
WRITE OF
DATA LATCHES
READ OPERATION NOT POSSIBLE
ERASE CYCLE
WRITE CYCLE
tPROG
READ OPERATION POSSIBLE
LAT
PGM
EEPROM INTERRUPT
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