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ML60851D Просмотр технического описания (PDF) - Oki Electric Industry

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ML60851D
OKI
Oki Electric Industry OKI
ML60851D Datasheet PDF : 82 Pages
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1Semiconductor
PEDL60851D-01
ML60851D
Configuration state:
When the local MPU asserts the configuration bits EP1CON, EP2CON, or EP3CON in response to a
SET_CONFIGURATION request from the host computer when this IC is in the address state, by writing a
“1” in this bit also, if necessary, at that time, it is possible to give an indication that the ML60851D has
entered the configuration state. Since the content of this bit does not affect the operation of the ML60851D,
there is no need to write in this bit if it will not be read out.
Remarks:
When all these three states are “1”, it means that this IC is normally operating. However, since these bits do
not affect the operation of the ML60851D, there is no need to write in these bits if they will not be read out.
Suspend state:
When the idle condition continues for more than 3ms in the USB bus, the ML60851D automatically asserts
this bit thereby indicating that it is going into the suspend state. At the same time, bit D6 of the interrupt
status register INTSTAT is asserted and the INTR pin is asserted. With this, the local MCU can suppress
the current consumption.
This bit is deasserted when the EOP of any type of packet is received.
Remote wake-up:
The ML60851D is in the suspend state, the remote wake-up function is activated when the local MCU
asserts this bit. When this bit is written while 5ms have not yet elapsed in the idle condition, the remote
wake-up signal is output after waiting for the idle condition to continue for the full 5ms period. Further,
when this bit is written after the idle condition has persisted for 5ms or more, the remote wake-up signal is
output immediately after this bit is written. This bit is deasserted automatically when the suspend state is
released by receiving the resume instruction over the USB bus.
USB bus reset status clear:
When the ML60851D is in the USB bus reset interrupt state (bit D5 of the interrupt status register, that is
the USB bus reset interrupt status bit is “1” and the INTR pin is asserted), it is possible to clear the interrupt
status by writing a “1” in this bit. (This makes the USB bus reset interrupt status bit “0” and deassertes
INTR.) Although this bit can be read out, the read out value will always be “0”.
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