CYUSB3302 Просмотр технического описания (PDF) - Cypress Semiconductor
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CYUSB3302 Datasheet PDF : 33 Pages
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CYUSB330x
CYUSB331x
CYUSB332x
eFuse programming is supported under the following conditions:
Temperature range of 25 °C–70 °C and programming voltage of
2.5 V–2.7 V.
Figure 12. Pin-Strap With LED or LED-Only Connection
VDD_IO
To GPIO
Pin-Strap Configuration
Pin-straps are supported for select product options (see Table 1)
to provide reconfigurability without an additional EEPROM. The
pin-strap configuration is enabled by pulling the Pin #63 of 88-pin
QFN HIGH. Table 5 shows the configuration options supported
through pin-straps and the GPIOs used for this purpose.
Figure 12 and Figure 13 show how the GPIOs need to be
connected if pin-strap and LED connection are required or only
pin-strap is required.
HX3 samples pin-strap GPIOs at power-up. Floating straps are
considered as invalid and the default configuration is used. If
PIN_STRAP (Pin #63 of 88-pin QFN) is floating, all strap inputs
are considered invalid. A GPIO is considered strapped “1” or “0”
when connected with a weak pull-up (10 k) or pull-down
(10 k) respectively. After the initial sampling at power-up and
reset, the GPIOs are used in their normal functions.
Table 5. Pin-Strap Configuration
10 k
800 –
1 k
10 k
800 –
1 k
To GPIO
Pin-Strap HIGH
with LED
VSS
Pin-Strap LOW
with LED
Figure 13. Pin-Strap Connection
VDD_IO
To GPIO
10 k
10 k
To GPIO
Pin-Strap HIGH
VSS
Pin-Strap LOW
88-QFN
Pin #
31
38
86
87
35
2
4
3
6
5
84
85
64
43
63
30
Pin-Strap Name
PWR_SW_POL
DS1_CDP_EN[8]
DS2_CDP_EN[8]
DS3_CDP_EN[8]
DS4_CDP_EN[8]
ACA_DOCK
PORT_DISABLE[1]
PORT_DISABLE[0]
NON_REMOVABLE[1][9]
NON_REMOVABLE[0][9]
PWR_EN_SEL
VID[2]
VID[1]
VID[0]
PIN_STRAP[10]
I2C_DEV_ID[11]
Strapped ‘0’[7]
Strapped ‘1’[7]
Power enable and overcurrent will be active Power enable and overcurrent will be active
LOW
HIGH
strapped ‘0’
strapped ‘1’
strapped ‘0’
strapped ‘1’
DS1 CDP enabled DS1 CDP disabled DS1 CDP disabled DS1 CDP enabled
DS2 CDP enabled DS2 CDP disabled DS2 CDP disabled DS2 CDP enabled
DS3 CDP enabled DS3 CDP disabled DS3 CDP disabled DS3 CDP enabled
DS4 CDP enabled DS4 CDP disabled DS4 CDP disabled DS4 CDP enabled
Disabled
Enabled
PORT_DISABLE[1:0] =
b’00: DS1, DS2, DS3, DS4 active
b’01: DS1, DS2, DS3 active
b’10: DS1, DS2 active
b’11: DS1 active
Pin-straps cannot enable ports disabled by factory setting.
NON_REMOVABLE[1:0] =
b’00: DS1, DS2, DS3, DS4 removable
b’01: DS1, DS2, DS3 removable
b’10: DS1, DS2 removable
b’11: DS1 removable
Individual
Gang
Reserved. If PIN_STRAP is enabled and CY VID is required, strap VID[2:0] to ‘1’.
No pin-strapping
ID 0: HX3 I2C slave address (7 bits) is 0x60.
This is also the default I2C slave address for
the 68-pin QFN package.
Pin-strapping configuration enabled
ID 1: HX3 I2C slave address (7 bits) is 0x58
Notes
7. See Figure 12 and Figure 13.
8. DSx_CDP_EN will be active LOW input when PWR_SW_POL is set to active LOW; similarly DSx_CDP_EN will be active HIGH input when PWR_SW_POL is set to
active HIGH.
9. These DS ports are exposed ports and the connected devices can be removed.
10. VID, PORT_DISABLE, NON_REMOVABLE are group straps. If one of the pins in a group strap is floating (INVALID), that group input will be INVALID and the default
will not be overwritten.
11. I2C_DEV_ID is valid only when HX3 is in I2C slave mode.
Document Number: 001-73643 Rev. *G
Page 18 of 33
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