S3C70F2 Просмотр технического описания (PDF) - Samsung

Номер в каталоге

Компоненты Описание

производитель

S3C70F2

single-chip CMOS microcontroller

Samsung 

ELECTRICAL DATA

S3C70F2/C70F4/P70F4

Table 14-6. A.C. Electrical Characteristics ( Concluded)

(TA = – 40 °C to + 85 °C, VDD = 1.8 V to 5.5 V)

Parameter

Symbol

Conditions

SCK High, Low

Width

tKH, tKL VDD = 2.7 V to 5.5 V

External SCK source

Internal SCK source

VDD = 1.8 V to 5.5 V

External SCK source

Internal SCK source

SI Setup Time to tSIK VDD = 2.7 V to 5.5 V

SCK High

External SCK source

Internal SCK source

VDD = 1.8 V to 5.5 V

External SCK source

SI Hold Time to

SCK High

Internal SCK source

tKSI

VDD = 2.7 V to 5.5 V

External SCK source

Internal SCK source

VDD = 1.8 V to 5.5 V

External SCK source

Output Delay for

SCK to SO

tKSO (1)

Internal SCK source

VDD = 2.7 V to 5.5 V

External SCK source

Internal SCK source

VDD = 1.8 V to 5.5 V

External SCK source

Interrupt Input

High, Low Width

RESET Input

Low Width

tINTH,

tINTL

tRSL

Internal SCK source

INT0

INT1, KS0–KS2

Input

Min

Typ

335

–

tKCY/2 – 50

1600

tKCY/2 – 150

100

–

150

150

500

400

–

400

600

500

–

–

(2)

–

10

10

–

Max

–

–

–

300

250

1000

1000

–

–

NOTES:

1. R (1 Kohm) and C (100 pF) are the load resistance and load capacitance of the SO output line.

2. Minimum value for INT0 is based on a clock of 2tCY or 128 / fx as assigned by the IMOD0 register setting.

Units

ns

ns

ns

ns

µs

µs

14-6

Share Link: