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PT6552 Просмотр технического описания (PDF) - Princeton Technology

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PT6552 Datasheet PDF : 22 Pages
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PT6552
/RES AND THE DISPLAY CONTROLLER
Since the LSI internal data (D1 to D90 and the control data) is undefined when power is first applied, the output pins
SG1/P1 to SG4/P4, SG5 to SG43, COM1, COM2, KS1/SG44 and KS2/SG45 should be held low by setting the /RES pin
low at the same time as power is applied. Then, meaningless displays at power on can be prevented by transferring data
from the controller and setting /RES high when that transfer has completes.
t1: Determined by the value of C and R
t2: 10μs min
Figure 1
V1.3
16
July 2010

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