MPC8270ZUP Просмотр технического описания (PDF) - Freescale Semiconductor
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MPC8270ZUP Datasheet PDF : 83 Pages
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AC Electrical Characteristics
NOTE
Activating data pipelining (setting BRx[DR] in the memory controller)
improves the AC timing.
This table lists SIU input characteristics.
Table 13. AC Characteristics for SIU Inputs1
Spec Number
Value (ns)
Setup Hold
Characteristic
Setup
Hold
66 MHz 83 MHz 100 MHz 66 MHz 83 MHz 100 MHz
sp11 sp10 AACK/TA/TS/DBG/BG/BR/ARTRY/
TEA
6
5
3.5
0.5
0.5
0.5
sp12 sp10 Data bus in normal mode
5
4
3.5
0.5
0.5
0.5
sp13 sp10 Data bus in ECC and PARITY modes
7
5
3.5
0.5
0.5
0.5
sp13a sp10 Pipeline mode—Data bus (with or without
ECC/PARITY)
5
4
2.5
0.5
0.5
0.5
sp14 sp10 DP pins
7
5
3.5
0.5
0.5
0.5
sp14a sp10 Pipeline mode—DP pins
—
4
2.5
—
0.5
0.5
sp15 sp10 All other pins
5
4
3.5
0.5
0.5
0.5
1 Input specifications are measured from the 50% level of the signal to the 50% level of the rising edge of CLKIN. Timings are
measured at the pin.
This table lists SIU output characteristics.
Table 14. AC Characteristics for SIU Outputs1
Spec Number
Value (ns)
Max Min
Characteristic
Maximum Delay
Minimum Delay
66 MHz 83 MHz 100 MHz 66 MHz 83 MHz 100 MHz
sp31 sp30 PSDVAL/TEA/TA
7
6
5.5
1
1
1
sp32 sp30 ADD/ADD_atr./BADDR/CI/GBL/WT
sp33a sp30 Data bus2
8
6.5
5.5
1
1
1
6.5
6.5
5.5
0.7
0.7
0.7
sp33b sp30 DP
6
5.5
5.5
1
1
1
sp34 sp30 Memory controller signals/ALE
6
5.5
5.5
1
1
1
sp35 sp30 All other signals
6
5.5
5.5
1
1
1
sp35a sp30 AP
7
7
7
1
1
1
1 Output specifications are measured from the 50% level of the rising edge of CLKIN to the 50% level of the signal. Timings are
measured at the pin.
2 To achieve 1 ns of hold time at 66, 83, or 100 MHz, a minimum loading of 20 pF is required.
MPC8280 PowerQUICC II Family Hardware Specifications, Rev. 2
22
Freescale Semiconductor
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