CR6853 Просмотр технического описания (PDF) - ChengduChip-RailTech

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CR6853

Novel Low Cost Green-Power PWM Controller

ChengduChip-RailTech 

CR6853

the GATE pin operate again. So the

frequency of the internal OSC is invariable,

the register would reset some pulses so that

the practical frequency is decreased at the

GATE pin.

Internal Synchronized Slop

Compensation

Although there are more advantages of

the current mode control than conventional

voltage mode control, there are still several

drawbacks of peak-sensing current-mode

converter, especially the open loop

instability when it operates in higher than

50% of the duty-cycle. To solve this problem,

the CR6853 is introduced an internal slope

compensation adding voltage ramp to the

current sense input voltage for PWM

generation. It improves the close loop

stability greatly at CCM, prevents the

sub-harmonic oscillation and thus reduces

the output ripple voltage.

VSLOP

= 0.33× DUTY

DUTYMAX

= 0.4389 × DUTY

value

( ∆I

= VIN

LP

× TD )

due

to

the

system

delay time that is from detecting the current

through the Sense pin to power MOSFET off

in the CR6853 (Among these, VIN is the

primary winding voltage of the transformer

and LP is the primary wind inductance). VIN

ranges from 85VAC to 264VAC. To

guarantee the output power is a constant for

universal input AC voltage, there is a

dynamic peak limit circuit to compensate the

system delay T that the system delay brings

on.

IPEAK MAX

=

0.65V

RSENSE

(VIN

= 264V )

IPEAK MAX

=

0.85V

RSENSE

(VIN

= 85V )

Low EMI technique

The frequency low EMI technique is

introduced in the CR6853. As following

figure, the internal oscillation frequency is

modulated by itself. A whole surge cycle

includes 8 pulses and the jittering ranges

from -4% to +4%. Thus, the function could

minimize the electromagnetic interferer from

the power supply module.

Slop Compensation

Current Sensing & Dynamic peak

limiting

The current flowing by the power

MOSFET comes into being a voltage VSENSE

on the Sense pin cycle-by-cycle, which

compares to the internal reference voltage,

and controls the reverse of the internal

register, limits the peak current IMAX of the

primary of the transformer. The transformer

energy is

E

=

1

2

×

L

×

I

MAX

2

.

So

adjusting

the RSENSE can set the maximal output

power of the power supple. The current

flowing by the power MOSFET has an extra

Dec, 2007 V1.1

Chengdu Chip-Rail Tech. Co., Ltd.

Frequency low EMI

OLP&SCP

To protect the circuit from being

damaged under the over load or short circuit

condition, a smart OLP&SCP function is

implemented in the CR6853. When short

circuit or over load occurs in the output end,

the feedback cycle would enhance the

voltage of FB pin, while the voltage is over

4.2V or the current from FB is below 152uA,

the internal detective circuit would send a

signal to shut down the GATE and pull down

the VDD voltage, then the circuit is restart.

To avoid the wrong operation when circuit

starts, the delay time is set. When the RI

7/11

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