N25Q128A23EF840G Просмотр технического описания (PDF) - Micron Technology
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N25Q128A23EF840G
Micron Technology
N25Q128A23EF840G Datasheet PDF : 81 Pages
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128Mb, 3V, Multiple I/O Serial Flash Memory
Device Protection
Table 5: Protected Area Sizes – Upper Area (Continued)
Note 1 applies to the entire table
Status Register Content
Top/
Bottom
Bit
BP3
BP2
BP1
BP0
0
0
1
1
0
0
0
1
1
1
0
1
0
0
0
0
1
0
0
1
0
1
0
1
0
0
1
0
1
1
0
1
1
0
0
0
1
1
0
1
0
1
1
1
0
0
1
1
1
1
Memory Content
Protected Area
Upper 8th
Upper quarter
Upper half
All sectors
All sectors
All sectors
All sectors
All sectors
All sectors
All sectors
Unprotected Area
Sectors (0 to 223)
Sectors (0 to 191)
Sectors (0 to 127)
None
None
None
None
None
None
None
Note: 1. See the Status Register for details on the top/bottom bit and the BP 3:0 bits.
Table 6: Protected Area Sizes – Lower Area
Note 1 applies to the entire table
Status Register Content
Top/
Bottom
Bit
BP3
BP2
BP1
BP0
1
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
1
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
0
0
0
1
1
0
0
1
1
1
0
1
0
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
Memory Content
Protected Area
None
Lower 256th
Lower 128th
Lower 64th
Lower 32th
Lower 16nd
Lower 8th
Lower quarter
Lower half
All sectors
All sectors
All sectors
All sectors
All sectors
All sectors
All sectors
Unprotected Area
All sectors
Sectors (1 to 255)
Sectors (2 to 255)
Sectors (4 to 255)
Sectors (8 to 255)
Sectors (16 to 255)
Sectors (32 to 255)
Sectors (64 to 255)
Sectors (128 to 255)
None
None
None
None
None
None
None
Note: 1. See the Status Register for details on the top/bottom bit and the BP 3:0 bits.
PDF: 09005aef845665fe
n25q_128mb_3v_65nm.pdf - Rev. P 06/13 EN
15
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