CYUSB3031(2013) Просмотр технического описания (PDF) - Cypress Semiconductor
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CYUSB3031 Datasheet PDF : 50 Pages
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CYUSB3035
Table 4. FX3S Input Clock Specifications
Parameter
Phase noise
Maximum frequency deviation
Duty cycle
Overshoot
Undershoot
Rise time/fall time
Description
100-Hz offset
1- kHz offset
10-kHz offset
100-kHz offset
1-MHz offset
32-kHz Watchdog Timer Clock Input
FX3S includes a watchdog timer. The watchdog timer can be
used to interrupt the ARM926EJ-S core, automatically wake up
the FX3S in Standby mode, and reset the ARM926EJ-S core.
The watchdog timer runs a 32-kHz clock, which may be
optionally supplied from an external source on a dedicated FX3S
pin.
The firmware can disable the watchdog timer.
Requirements for the optional 32-kHz clock input are listed in
Table 5.
Table 5. 32-kHz Clock Input Requirements
Parameter
Min
Max
Units
Duty cycle
40
60
%
Frequency deviation
–
±200 ppm
Rise time/fall time
–
200
ns
Specification
Min
Max
–
–75
–
–104
–
–120
–
–128
–
–130
–
150
30
70
–
3
–
–3
–
3
Units
dB
dB
dB
dB
dB
ppm
%
%
%
ns
Power
FX3S has the following power supply domains:
■ IO_VDDQ: This is a group of independent supply domains for
digital I/Os. The voltage level on these supplies is 1.8 V to 3.3 V.
FX3S provides six independent supply domains for digital I/Os
listed as follows (see Pin Description on page 16 for details on
each of the power domain signals):
❐ VIO1: GPIF II I/O
❐ VIO2: S0-Port Supply
❐ VIO3: S1-Port Supply
❐ VIO4: S1-Port and Low Speed Peripherals (UART/SPI/I2S)
Supply
❐ VIO5: I2C and JTAG (supports 1.2 V to 3.3 V)
❐ CVDDQ: Clock
❐ VDD: This is the supply voltage for the logic core. The nominal
supply-voltage level is 1.2 V. This supplies the core logic
circuits. The same supply must also be used for the following:
• AVDD: This is the 1.2-V supply for the PLL, crystal oscilla-
tor, and other core analog circuits
• U3TXVDDQ/U3RXVDDQ: These are the 1.2-V supply volt-
ages for the USB 3.0 interface.
■ VBATT/VBUS: This is the 3.2-V to 6-V battery power supply for
the USB I/O and analog circuits. This supply powers the USB
transceiver through FX3S's internal voltage regulator. VBATT
is internally regulated to 3.3 V.
Document Number: 001-84160 Rev. *B
Page 11 of 50
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