USB3318C-CP-TR Просмотр технического описания (PDF) - Microchip Technology

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USB3318C-CP-TR

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Microchip Technology 

Hi-Speed USB Transceiver with 1.8V-3.3V ULPI Interface - 13MHz Reference Clock

Datasheet

Chapter 5 Architecture Overview

The USB3318 consists of the blocks shown in the diagram below. All pull-up resistors shown in

Figure 5.1 are connected to VDD33.

CPEN

ID

VBUS

VBAT

VDD33

DP

DM

IdGndDrv

LDO

IdGnd

IdFloat

Rid Value

SessEnd

SessValid

VbusValid

TX

RX

ULPI Digital

DATA7

DATA6

DATA5

DATA4

DATA3

DATA2

DATA1

DATA0

STP

NXT

DIR

CLKOUT

RESETB

VDDIO

VDD18

HS/FS/LS

TX Encoding

HS/FS/LS

RX Decoding

Integrated

Low Jitter

PLL

REFCLK

BIAS

RBIAS

5.1

5.2

5.2.1

Figure 5.1 USB3318 System Diagram

ULPI Digital Operation and Interface

This section of the USB3318 is covered in detail in Chapter 6, ULPI Operation Overview.

Interface to DP/DM

The blocks in the lower left-hand corner of Figure 5.1 interface to the DP/DM pins.

USB Transceiver

The USB3318 transceiver includes the receivers and transmitters required to be compliant to the

Universal Serial Bus Specification Rev 2.0. The DP/DM signals in the USB cable connect directly to

the receivers and transmitters.

The RX block consists of separate differential receivers for HS and FS/LS mode. Depending on the

mode, the selected receiver provides the serial data stream through the multiplexer to the RX Logic

block. For HS mode support, the HS RX block contains a squelch circuit to insure that noise is not

interpreted as data. The RX block also includes a single-ended receiver on each of the data lines to

determine the correct FS linestate.

Revision 2.1 (06-02-10)

20

DATASHEET

SMSC USB3318 REV C

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