PIC12F1840 Просмотр технического описания (PDF) - Microchip Technology

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PIC12F1840

8-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

3.3.1 SPECIAL FUNCTION REGISTER

The Special Function Registers are registers used by

the application to control the desired operation of

peripheral functions in the device. The Special Function

Registers occupy the 20 bytes after the core registers of

every data memory bank (addresses x0Ch/x8Ch

through x1Fh/x9Fh). The registers associated with the

operation of the peripherals are described in the appro-

priate peripheral chapter of this data sheet.

3.3.2 GENERAL PURPOSE RAM

There are up to 80 bytes of GPR in each data memory

bank. The Special Function Registers occupy the 20

bytes after the core registers of every data memory

bank (addresses x0Ch/x8Ch through x1Fh/x9Fh).

3.3.2.1 Linear Access to GPR

The general purpose RAM can be accessed in a

non-banked method via the FSRs. This can simplify

access to large memory structures. See Section 3.6.2

“Linear Data Memory” for more information.

3.3.3 COMMON RAM

There are 16 bytes of common RAM accessible from all

banks.

PIC12(L)F1840

FIGURE 3-2:

BANKED MEMORY

PARTITIONING

7-bit Bank Offset

Memory Region

00h

Core Registers

(12 bytes)

0Bh

0Ch

Special Function Registers

(20 bytes maximum)

1Fh

20h

General Purpose RAM

(80 bytes maximum)

6Fh

70h

Common RAM

(16 bytes)

7Fh

3.3.4 DEVICE MEMORY MAPS

The memory maps for the device family are as shown

in Table 3-3.

 2011-2012 Microchip Technology Inc.

DS41441C-page 17

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