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DALC208(1999) Просмотр технического описания (PDF) - STMicroelectronics

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Компоненты Описание
производитель
DALC208
(Rev.:1999)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
DALC208 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
DALC208SC6
TECHNICAL INFORMATION
SURGE PROTECTION
The DALC208SC6 is particularly optimized to
perform surge protection based on the rail to rail
topology.
The clamping voltage VCL can be calculated as
follow :
VCL+ = VREF2 + VF for positive surges
VCL- = VREF1 - VF for negative surges
with : VF = Vt + rd.Ip
(VF forward drop voltage) / (Vt forward drop
threshold voltage)
According to the curve Fig.5 on page 3, we
assume that the value of the dynamic resistance of
the clamping diode is typically rd = 0.7and Vt =
1.2V.
For an IEC 1000-4-2 surge Level 4 (Contact
Discharge: Vg=8kV, Rg=330), VREF2 = +5V,
VREF1 = 0V, and if in first approximation, we
assume that : Ip=Vg/Rg 24A.
So, we find:
VCL+ +23V
VCL- -18V
Note: the calculations do not take into account
phenomena due to parasitic inductances
APPLICATION EXAMPLE
If we consider that the connections from the pin
REF2 to VCC and from REF1 to GND are done by
two tracks of 10mm long and 0.5mm large; we
assume that the parasitic inductances of these
tracks are about 6nH.
So when an IEC 1000-4-2 surge occurs, due to the
rise time of this spike (tr=1ns), the voltage VCL has
an extra value equal to Lw.dI/dt.
The dI/dt is calculated as: di/dt = Ip/tr 24 A/ns
The overvoltage due to the parasitic inductances
is: Lw.di/dt = 6 x 24 144V
By taking into account the effect of these parasitic
inductances due to unsuitable layout, the clamping
voltage will be :
VCL+ = +23 + 144 167V
VCL- = -18 - 144 -162V
We can reduce as much as possible these
phenomena with simple layout optimization.
It’s the reason why some recommendations have
to be followed (see paragraph "How to ensure a
good ESD protection").
Fig. A1: ESD behavior; parasitic phenomena due to unsuitable layout.
4/10
ESD
SURGE
Lw
Lw di
Vf
dt
I/O
REF2=+Vcc
VI/O
Lw di
dt
Vcl+ =
Vcc+Vf+
Lw
di
dt
Vcl- =
-Vf-
Lw
di
dt
surge >0
surge <0
REF1=GND
Vcl+
167V
Lw di
dt
POSITIVE
SURGE
Vcc+Vf
t
tr=1ns
tr=1ns
t
-Vf
-Lw di
dt
NEGATIVE
SURGE
-162V
Vcl-

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