74LVC823ADB Просмотр технического описания (PDF) - NXP Semiconductors.

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74LVC823ADB

9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive edge-trigger; 3-state

NXP Semiconductors. 

Nexperia

74LVC823A

9-bit D-type flip-flop; 5 V tolerance; positive edge-trigger; 3-state

VI

CP input

GND

VI

MR input

GND

VM

t rem

tW

VM

VM

VOH

Qn output

VOL

t PHL

VM

001aaa852

Fig 9.

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage levels that occur with the output load.

Master reset pulse width, master reset to clock removal time and master reset to output propagation

delay

VI

OE input

GND

VCC

Qn output

LOW- to - OFF

OFF- to - LOW

VOL

VOH

Qn output

HIGH- to - OFF

OFF- to - HIGH

GND

VM

t PLZ

VM

t PZL

t PHZ

VX

VY

outputs

enabled

VM

t PZH

outputs

disabled

VM

outputs

enabled

mgu775

Measurement points are given in Table 8.

VOL and VOH are the typical output voltage drops that occur with the output load.

Fig 10. 3-state outputs enable and disable times

74LVC823A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 8 April 2013

© Nexperia B.V. 2017. All rights reserved

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