FXAS21002CQR1 Просмотр технического описания (PDF) - Freescale Semiconductor

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FXAS21002CQR1

3-Axis Digital Angular Rate Gyroscope

Freescale Semiconductor 

Digital Interfaces

The transmitter must release the SDA line during the ACK period. The receiver must

then pull the data line low so that it remains consistently low during the high period of

the acknowledge clock period. The number of bytes per transfer is unlimited. If a

receiver can't receive another complete byte of data until it has performed some other

function, it can hold the clock line, SCL, low to force the transmitter into a wait state.

Data transfer only continues when the receiver is ready for another byte and releases

the data line. This delay action is called clock stretching. Not all receiver devices

support clock stretching. Not all master devices recognize clock stretching.

A LOW-to-HIGH transition on the SDA line while SCL is high is defined as a stop

condition (SP) signal. A write or burst write is always terminated by the master

issuing the SP signal. A master should properly terminate a read by not

acknowledging a byte at the appropriate time in the protocol. A master may also issue

a repeated start signal (SR) during a transfer.

3.1.2 I²C Read Operations

3.1.2.1 Single-Byte Read

The master (or MCU) transmits an ST to the FXAS21002C, followed by the slave

address, with the R/W bit set to “0” for a write, and the FXAS21002C sends an

acknowledgement. Then, the MCU transmits the address of the register to read and the

FXAS21002C sends an acknowledgement. The MCU transmits an SR, followed by

the byte containing the slave address and the R/W bit set to “1” for a read from the

previously selected register. The FXAS21002C then acknowledges and transmits the

data from the requested register. The master transfers a NACK followed by an SP,

signaling an end of transmission.

3.1.2.2 Multiple-Byte Read

When performing a multiple-byte or burst read, the FXAS21002C increments the

register address read pointer after a read command is received. Therefore, after

following the steps of a single-byte read, multiple bytes of data can be read from

sequential registers after each FXAS21002C ACK is received. This continues until the

master transfers a NACK followed by an SP, signaling an end of transmission.

3-Axis Digital Angular Rate Gyroscope, Rev. 2.1, 5/2015

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Freescale Semiconductor, Inc.

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