ATSAM3S(2009) Просмотр технического описания (PDF) - Atmel Corporation
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ATSAM3S Datasheet PDF : 65 Pages
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SAM3S Summary
Figure 5-3. Backup Battery
Backup
Battery +
-
Main Supply
IN
OUT
3.3V
LDO
ON/OFF
ADC, DAC, Analog
Comparator Supply
(2.4V-3.6V)
VDDIO
VDDIN
VDDOUT
VDDCORE
VDDPLL
USB
Transceivers.
ADC, DAC
Analog Comp.
Voltage
Regulator
PIOx (Output)
External wakeup signal
WAKEUPx
Note: The two diodes provide a “switchover circuit” (for illustration purpose)
between the backup battery and the main supply when the system is put in
backup mode.
5.4 Active Mode
Active mode is the normal running mode with the core clock running from the fast RC oscillator,
the main crystal oscillator or the PLLA. The power management controller can be used to adapt
the frequency and to disable the peripheral clocks.
5.5 Low Power Modes
The various low power modes of the SAM3S are described below:
5.5.1
Backup Mode
The purpose of backup mode is to achieve the lowest power consumption possible in a system
which is performing periodic wake-ups to perform tasks but not requiring fast startup time
(<0.1ms). Total current consumption is 3 µA typical.
The Supply Controller, zero-power power-on reset, RTT, RTC, Backup registers and 32 kHz
oscillator (RC or crystal oscillator selected by software in the Supply Controller) are running. The
regulator and the core supply are off.
Backup mode is based on the Cortex-M3 deepsleep mode with the voltage regulator disabled.
The SAM3S can be awakened from this mode through WUP0-15 pins, the supply monitor (SM),
the RTT or RTC wake-up event.
Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the System Con-
trol Register of the Cortex-M3 set to 1. (See the Power management description in The ARM
Cortex M3 Processor section of the product datasheet).
Exit from Backup mode happens if one of the following enable wake up events occurs:
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6500AS–ATARM–11-Dec-09
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