MT3333AV Просмотр технического описания (PDF) - MediaTek Inc

Номер в каталоге

Компоненты Описание

производитель

MT3333AV

High-performance Single-chip Multi-gnss Solution

MediaTek Inc 

5.8. Low power detection

MT3333 All-in-One GNSS

Datasheet

A low power detection circuit is included. Whenever the independent power source (AVDD11_RTC) voltage

becomes low, the low power detection circuit will provide an indicator signal at pin 32K_OUT (output high in

normal condition and low in low-power condition).

5.9. Clock module

The clock module generates all internal clocks required by the processor, correlator, internal memory, bus

interface and so on. The referenced input clock is generated from the RF subsystem.

5.10. Reset controller

The built-in reset controller generates reset signals for all digital blocks. It has power-on reset feature and

hardware trapping function. The power-on reset level is 2.7 ± 0.1 volts. The software reset function for different

circuit blocks are also included for flexible applications.

In Figure 5-2, the voltage drop time Tdrop_vbat and Tdrop_cldo depend on the capacitance connection of their power

net. But Tdrop_vbat > Tdrop_cldo should be guaranteed for the correct operation of reset behavior during power off

sequence. It is strongly recommend using external LDOs without output discharged function or make sure Tdrop_vbat

> 1 ms.

Figure 5-1: Power on reset diagram

© 2016 - 2017 MediaTek Inc.

Page 8 of 22

This document contains information that is proprietary to MediaTek Inc. (“MediaTek”) and/or its licensor(s).

Any unauthorized use, reproduction or disclosure of this document in whole or in part is strictly prohibited.

Share Link: