SAM7S16 Просмотр технического описания (PDF) - Atmel Corporation

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SAM7S16

AT91SAM ARM-based Flash MCU

Atmel Corporation 

7.4 Peripheral DMA Controller

z Handles data transfer between peripherals and memories

z Eleven channels: SAM7S512/256/128/64/321/161

z Nine channels: SAM7S32/16

z Two for each USART

z Two for the Debug Unit

z Two for the Serial Synchronous Controller

z Two for the Serial Peripheral Interface

z One for the Analog-to-digital Converter

z Low bus arbitration overhead

z One Master Clock cycle needed for a transfer from memory to peripheral

z Two Master Clock cycles needed for a transfer from peripheral to memory

z Next Pointer management for reducing interrupt latency requirements

z Peripheral DMA Controller (PDC) priority is as follows (from the highest priority to the lowest):

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DBGU

USART0

USART1

SSC

ADC

SPI

DBGU

USART0

USART1

SSC

SPI

SAM7S Series [DATASHEET] 17

6175M–ATARM–26-Oct-12

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