AT91SAM9G20B-CFU(2010) Просмотр технического описания (PDF) - Atmel Corporation

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AT91SAM9G20B-CFU
(Rev.:2010)

AT91 ARM Thumb Microcontrollers

Atmel Corporation 

7.2.1

7.2.2

– Round-Robin Arbitration, either with no default master, last accessed default master

or fixed default master

• Burst Management

– Breaking with Slot Cycle Limit Support

– Undefined Burst Length Support

• One Address Decoder provided per Master

– Three different slaves may be assigned to each decoded memory area: one for

internal boot, one for external boot, one after remap

• Boot Mode Select

– Non-volatile Boot Memory can be internal or external

– Selection is made by BMS pin sampled at reset

• Remap Command

– Allows Remapping of an Internal SRAM in Place of the Boot Non-Volatile Memory

• Allows Handling of Dynamic Exception Vectors

Matrix Masters

The Bus Matrix of the AT91SAM9G20 manages six Masters, which means that each master can

perform an access concurrently with others, according the slave it accesses is available.

Each Master has its own decoder that can be defined specifically for each master. In order to

simplify the addressing, all the masters have the same decodings.

Table 7-1.

Master 0

Master 1

Master 2

Master 3

Master 4

Master 5

List of Bus Matrix Masters

ARM926™ Instruction

ARM926 Data

PDC

ISI Controller

Ethernet MAC

USB Host DMA

Matrix Slaves

Each Slave has its own arbiter, thus allowing to program a different arbitration per Slave.

Table 7-2.

Slave 0

Slave 1

Slave 2

Slave 3

Slave 4

List of Bus Matrix Slaves

Internal SRAM0 16 KBytes

Internal SRAM1 16 KBytes

Internal ROM

USB Host User Interface

External Bus Interface

Internal Peripherals

16 AT91SAM9G20 Summary

6384DS–ATARM–13-Jan-10

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