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производитель

AD5340
(Rev.:Rev0)

2.5 V to 5.5 V, 115
A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

Analog Devices 

AD5330/AD5331/AD5340/AD5341–SPECIFICATIONS

(VDD = 2.5 V to 5.5 V, VREF = 2 V. RL = 2 k⍀ to GND; CL = 200 pF to GND; all specifications TMIN to TMAX unless otherwise noted.)

Parameter1

B Version2

Min

Typ

Max

Unit

Conditions/Comments

DC PERFORMANCE3, 4

AD5330

Resolution

Relative Accuracy

Differential Nonlinearity

AD5331

Resolution

Relative Accuracy

Differential Nonlinearity

AD5340/AD5341

Resolution

Relative Accuracy

Differential Nonlinearity

Offset Error

Gain Error

Lower Deadband5

Upper Deadband

Offset Error Drift6

Gain Error Drift6

DC Power Supply Rejection Ratio6

8

± 0.15

± 0.02

10

± 0.5

± 0.05

12

±2

± 0.2

± 0.4

± 0.15

10

10

–12

–5

–60

±1

± 0.25

±4

± 0.5

± 16

±1

±3

±1

60

60

DAC REFERENCE INPUT6

VREF Input Range

VREF Input Impedance

Reference Feedthrough

1

VDD

0.25

VDD

>10

180

90

–90

Bits

LSB

LSB

Guaranteed Monotonic By Design Over All Codes

Bits

LSB

LSB

Guaranteed Monotonic By Design Over All Codes

Bits

LSB

LSB

% of FSR

% of FSR

mV

mV

ppm of FSR/°C

ppm of FSR/°C

dB

Guaranteed Monotonic By Design Over All Codes

Lower Deadband Exists Only if Offset Error Is Negative

VDD = 5 V. Upper Deadband Exists Only if VREF = VDD

∆VDD = ± 10%

V

Buffered Reference (AD5330, AD5340, and AD5341)

V

Unbuffered Reference

MΩ

Buffered Reference (AD5330, AD5340, and AD5341)

kΩ

Unbuffered Reference. Gain = 1, Input Impedance = RDAC

kΩ

Unbuffered Reference. Gain = 2, Input Impedance = RDAC

dB

Frequency = 10 kHz

OUTPUT CHARACTERISTICS6

Minimum Output Voltage4, 7

Maximum Output Voltage4, 7

DC Output Impedance

Short Circuit Current

Power-Up Time

LOGIC INPUTS6

Input Current

VIL, Input Low Voltage

VIH, Input High Voltage

Pin Capacitance

0.001

VDD–0.001

0.5

25

15

2.5

5

±1

0.8

0.6

0.5

2.4

2.1

2.0

3

V min

V max

Ω

mA

mA

µs

µs

µA

V

V

V

V

V

V

pF

Rail-to-Rail Operation

VDD = 5 V

VDD = 3 V

Coming Out of Power-Down Mode. VDD = 5 V

Coming Out of Power-Down Mode. VDD = 3 V

VDD = 5 V ± 10%

VDD = 3 V ± 10%

VDD = 2.5 V

VDD = 5 V ± 10%

VDD = 3 V ± 10%

VDD = 2.5 V

POWER REQUIREMENTS

VDD

IDD (Normal Mode)

VDD = 4.5 V to 5.5 V

VDD = 2.5 V to 3.6 V

IDD (Power-Down Mode)

VDD = 4.5 V to 5.5 V

VDD = 2.5 V to 3.6 V

2.5

5.5

V

140

250

µA

115

200

µA

0.2

1

µA

0.08

1

µA

DACs active and excluding load currents. Unbuffered

Reference. VIH = VDD, VIL = GND.

IDD increases by 50 µA at VREF > VDD – 100 mV.

In Buffered Mode extra current is (5 + VREF/RDAC) µA,

where RDAC is the resistance of the resistor string.

NOTES

1See Terminology section.

2Temperature range: B Version: –40°C to +105°C; typical specifications are at 25°C.

3Linearity is tested using a reduced code range: AD5330 (Code 8 to 255); AD5331 (Code 28 to 1023); AD5340/AD5341 (Code 115 to 4095).

4DC specifications tested with output unloaded.

5This corresponds to x codes. x = Deadband voltage/LSB size.

6Guaranteed by design and characterization, not production tested.

7In order for the amplifier output to reach its minimum voltage, Offset Error must be negative. In order for the amplifier output to reach its maximum voltage, V REF = VDD and

“Offset plus Gain” Error must be positive.

Specifications subject to change without notice.

–2–

REV. 0

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