74LVC245APW-Q100(2012) Просмотр технического описания (PDF) - NXP Semiconductors.

Номер в каталоге

Компоненты Описание

производитель

74LVC245APW-Q100
(Rev.:2012)

Octal bus transceiver; 3-state

NXP Semiconductors. 

74LVC245A-Q100; 74LVCH245A-Q100

Octal bus transceiver; 3-state

Rev. 1 — 3 September 2012

Product data sheet

1. General description

The 74LVC245A-Q100; 74LVCH245A-Q100 are 8-bit transceivers featuring non-inverting

3-state bus compatible outputs in both send and receive directions. The device features

an output enable (OE) input for easy cascading and a send/receive (DIR) input for

direction control. OE controls the outputs so that the buses are effectively isolated.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices in mixed

3.3 V and 5 V applications.

The 74LVCH245A-Q100 bus hold on data inputs eliminates the need for external pull-up

resistors to hold unused inputs.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits

 Automotive product qualification in accordance with AEC-Q100 (Grade 1)

 Specified from 40 C to +85 C and from 40 C to +125 C

 5 V tolerant inputs/outputs for interfacing with 5 V logic

 Wide supply voltage range from 1.2 V to 3.6 V

 CMOS low-power consumption

 Direct interface with TTL levels

 Inputs accept voltages up to 5.5 V

 High-impedance when VCC = 0 V

 Bus hold on all data inputs (74LVCH245A-Q100 only)

 Complies with JEDEC standard:

 JESD8-7A (1.65 V to 1.95 V)

 JESD8-5A (2.3 V to 2.7 V)

 JESD8-C/JESD36 (2.7 V to 3.6 V)

 ESD protection:

 MIL-STD-883, method 3015 exceeds 2000 V

 HBM JESD22-A114F exceeds 2000 V

 MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 )

Share Link: