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74LVC821ABQ,118 Просмотр технического описания (PDF) - NXP Semiconductors.

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74LVC821ABQ,118 Datasheet PDF : 20 Pages
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NXP Semiconductors
74LVC821A
10-bit D-type flip-flop; 5 V tolerance; positive-edge trigger; 3-state
TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4.4 mm
SOT355-1
D
y
Z
24
pin 1 index
1
e
E
A
X
c
HE
vM A
13
12
wM
bp
A2
A1
Q
(A 3)
A
θ
Lp
L
detail X
0
2.5
5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D(1) E(2)
e
HE
mm
1.1
0.15
0.05
0.95
0.80
0.25
0.30
0.19
0.2
0.1
7.9
7.7
4.5
4.3
0.65
6.6
6.2
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT355-1
MO-153
L
Lp
Q
v
w
y
Z (1) θ
1
0.75 0.4
0.50 0.3
0.2 0.13 0.1
0.5
0.2
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 13. Package outline SOT 355-1 (TSSOP24)
74LVC821A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 23 November 2012
© NXP B.V. 2012. All rights reserved.
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